{"title":"Measurement of stereo matching on images using dissimilarity estimation","authors":"P. Sakthivel, G. Balakrishnan","doi":"10.1109/ICDCSYST.2014.6926212","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926212","url":null,"abstract":"This paper proposes the dissimilarity based adaptive prior modelling for stereo images and improve the performance on images. The fast likelihood function based on rank transform implemented in matching images that replaces the intensity of a pixel with its rank among all pixels within a certain neighbourhood. Rank transform reduce the radiometric gain, bias also reduce the discriminatory power in stereo matching, by giving matching result. Adaptive prior modelling is proposed, improves the smoothness of matching result and is defined as a pixel wise energy function by using adaptive interference between neighbouring disparities. The disparity is estimated by minimizing the joined energy function which combines the likelihood matching and prior modelling. The dissimilarity based adaptive prior modelling measures the dissimilarity between joint energy function and gradient (GRAD). The optimal weight ω is determined between join energy function and gradient (GRAD) by maximizing the number of reliable correspondences that are filtered using cross checking test. Finally we consider filters like wiener, median, order static filter to improve the smoothness of stereo images.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129182075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel approach to thermometer-to-binary encoder of flash ADCs-bubble error correction circuit","authors":"Sandeep Kumar, M. Suman, K. L. Baishnab","doi":"10.1109/ICDCSYST.2014.6926213","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926213","url":null,"abstract":"Thermometer-to-binary (TM2B) encoder is a vital component of a flash Analog-to-Digital Converter (ADC). In this paper, we propose a new approach to subside Bubble Errors up to third-order. Whereas existing approaches deal with first/second-order bubble errors only, and failed with higher order of bubble errors. The simulation results illustrate that the proposed circuit requires lesser number of transistors and consequently consumes less power, which makes the circuit superior to the existing models. Bubble error correction circuit is simulated by using Xilinx (Verilog code) and verified all results with theory.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115461377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of low complexity variable digital filters using first order all pass transformation and improved coefficient decimation method","authors":"Abhishek Ambede, A. P. Vinod","doi":"10.1109/ICDCSYST.2014.6926204","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926204","url":null,"abstract":"Digital filters that provide variable frequency responses by controlling a small set of parameters are desired in numerous signal processing applications. In this paper, we present a new design technique to obtain variable lowpass, highpass, bandpass and bandstop frequency responses using a single lowpass prototype filter. The proposed variable digital filter (VDF) design technique employs first order all pass transformation and the improved coefficient decimation method (ICDM). ICDM is used to generate the four types of frequency responses and frequency warping using first order all pass transformation is performed to achieve variable cutoff frequencies for the obtained responses. In the proposed VDF, the nature of obtained frequency responses and their cutoff frequencies can be changed on-the-fly without the need of updating the filter coefficients. With the help of a design example, we show that the proposed VDF has a significantly lower implementation complexity when compared with other relevant VDF design methods in literature.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128032646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel single phase multilevel inverter with single photovoltaic source and less number of switches","authors":"M. Ranjana, P. K. Maroti, B. Revathi","doi":"10.1109/ICDCSYST.2014.6926189","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926189","url":null,"abstract":"In this paper a novel single phase multilevel inverter with single photovoltaic (PV) source and less number of switches is proposed. Photovoltaic based high power applications needs a multilevel inverter (MLI) with multiple sources to convert DC to AC. Conventional multilevel inverters required large number of capacitors, diodes, power switches and input sources. In order to overcome this drawback, proposed single phase MLI can be employed. Proposed MLI have single source and less number of switches, diodes and capacitors. Thus proposed MLI reduces the complexity of circuit design. In this paper, 9-Level MLI is proposed for photovoltaic applications with level shifting SPWM (sinusoidal pulse width modulation) technique. Proposed 9-level MLI is designed with rated power 2KW, 0.8 modulation index, 60V input supply. Total harmonic distortion (THD) of 9-level output voltage with LC filter and without LC filter is 4.56% and 17.29% respectively. The simulation results confirm the operation of proposed 9-level MLI and simulation is carried out in MATLAB/SIMULINK.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127130598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA implementation of modified leaky least mean square channel estimation algorithm","authors":"D. Bhoyar, C. Dethe, M. Mushrif","doi":"10.1109/ICDCSYST.2014.6926175","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926175","url":null,"abstract":"Channel estimation is a technique used to reduce channel inference in multipath data transmission. This paper analyses and implemented a suggested new method for channel estimation in MIMO-OFDM system. The proposed modified leaky least mean square channel estimation algorithm (M-LLMS) improves channel estimation accuracy in noisy environment. We compare the results of the proposed method with LMS, RLS and VLLMS channel estimators for SNR (1-35) and over 10,000 itertions. The computational complexities and the Bit Error Rate (BER) are reduced by the proposed algorithm.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124190792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"FPGA implementation of hybrid Han-Carlson adder","authors":"S. Gedam, Pravin Zode, Pradnya Zode","doi":"10.1109/ICDCSYST.2014.6926185","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926185","url":null,"abstract":"In this paper a modified parallel prefix adder, Hybrid Han-Carlson adder is proposed which uses different stages of Brent-Kung and Kogge-Stone adders. Binary addition is one of the primitive and most commonly used application in computer arithmetic. Parallel prefix adders offer a highly efficient solution to the binary addition problem and are well suited for FPGA implementation. Carry propagation in binary addition can be efficiently expressed as a prefix computation. Modified Hybrid Han-Carlson adder reduces the complexity, area and power consumption significantly.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126321385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation of wireless model for SVD based beam forming in MIMO systems","authors":"A. Sudhir, B. Rao","doi":"10.1109/ICDCSYST.2014.6926159","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926159","url":null,"abstract":"MIMO wireless system is considered with various modulation techniques such as BPSK and 16-QAM. After modulating the signal is sent through channel which is represented by beamforming technique using SVD. The channel is modeled as matrix and decomposed in to number of independent orthogonal modes of excitation which will be referred as eigen modes of channel. The transmit beamforming is produced by conducting the input signal with unitary matrix to perform transmit precoding, and the precoded symbols are transmitted over a Rayleigh fading channel. At receiver side, to retrieve the original input signal, the received signal is convolved with transpose of unitary matrix. The combining process is performed by using maximum ratio combiner (MRC) and receiver shape is performed. The derived expressions for average bit error rate (BER) for BPSK and average symbol error rate (SER) for M-QAM proves the quality factor of singular value decomposition (SVD) based beamforming schemes rather than other methods.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121343018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Separation and counting of blood cells using geometrical features and distance transformed watershed","authors":"J. Hari, A. Prasad, S. Rao","doi":"10.1109/ICDCSYST.2014.6926205","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926205","url":null,"abstract":"In the field of biomedicine, blood cells are complex in nature; the microscopic images of a blood stream contains RBCs, WBCs and Platelets. Pathological inspection of an infected cell based on the disease, is solely dependent on subjective assessment which usually leads to significant inter-observer variation in grading and subsequently resulting in late diagnosis. However automatic assessment of required cell count still remains a challenging task as many of the cells are clumped in an image and proper segmentation is the primary aspect. This paper aims at segmentation of blood cells for counting. Auto threshold, Chessboard distance measure and watersheding are used for segmentation of blood cells.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"466 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123099514","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Subash, T. Gnanasekaran, A. Karpagaselvi, R. Kavitha
{"title":"Low power consumption of sequential circuit of digital ICS","authors":"T. Subash, T. Gnanasekaran, A. Karpagaselvi, R. Kavitha","doi":"10.1109/ICDCSYST.2014.6926184","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926184","url":null,"abstract":"In this paper a new flip flop in the clock distribution network is introduced. Normally in the clock distribution networks a sinusoidal signal is given at the clock port. Here we are using the low swing DCCF by using reduced swing inverters. This flip flop output has to be checked at the two corners by using simulations that has to be extracted from the layout. The LS-DCCF has to be simulated by using the micro wind layout editor which is to be fabricated in the CMOS technology. The LC resonant clocking scheme has to be achieved around 5.8% in power reduction & the area consumption is about 5.7%. This unit has to be fabricated in 90nm CMOS technology. This paper presents low power clock tree by distributing the clock signal at a lower voltages and translating it to a higher voltage at the extreme point. It also avoids unwanted internal node transitions & leakage current problems. The resonant clock distribution network has high power savings compared to conventional square wave clocking. In the proposed paper the reduced swing inverters size has to be reduced and also the power savings has to be increased.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120958656","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Akila, K. Srinivasan, Paulsamy Muruganandam, K. Murali
{"title":"Phase-flip transition in coupled time-delayed piecewise linear electronic circuits","authors":"B. Akila, K. Srinivasan, Paulsamy Muruganandam, K. Murali","doi":"10.1109/ICDCSYST.2014.6926191","DOIUrl":"https://doi.org/10.1109/ICDCSYST.2014.6926191","url":null,"abstract":"We study the synchronization dynamics of mutually time-delay coupled intrinsic time-delay systems. In particular, we analyze the phase synchronized states and phase-flip transitions occurring in a bi-directionally time-delay coupled electronic circuit model with threshold nonlinearity using both numerical simulations and direct experiment. By varying the coupling delay for different coupling strengths, we identify the changes in the relative phase between the oscillators from in-phase to anti-phase and vice versa. We also carry out a detailed analysis by solving the delay differential equations numerically to confirm the phase-flip transition. Finally, the numerical predictions are verified with experiments.","PeriodicalId":252016,"journal":{"name":"2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114973001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}