{"title":"Piezoelectric Energy Harvester Design and Power Conditioning with Solar Integration","authors":"Bavleen Kaur, Abhishek Agnihotri, Deepti Thapar, Nikhil Arora","doi":"10.1109/IEMENTech48150.2019.8981015","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981015","url":null,"abstract":"Off-the-grid energy has generated quite some interest in the recent years. Researchers are focused on trying to harvest energy from every possible source. Harvesting energy from sources which don't result in significant contribution towards the energy needs is called energy scavenging, which promotes saving every ounce of energy. One such example is to tap electrical energy by making use of the force exerted by humans as they walk. This pressurized weight energy can be converted to the electrical form using piezo-electrical crystal. To ensure uninterrupted, off-the-grid supply, even when there is no crowd, a solar panel has been deployed. In this paper, a new prototype for power generating floor tile using PZT based mechanical vibration energy harvester in combination with solar energy is presented. The prototype gives promising results.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115220122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mili Sarkar, Shagufta Talaat Nasir, I. Chakraborty, Sougata Maity, R. Chakraborty, G. S. Taki
{"title":"Performance Analysis of Various FINFET Threshold Logic based Full Adder Design","authors":"Mili Sarkar, Shagufta Talaat Nasir, I. Chakraborty, Sougata Maity, R. Chakraborty, G. S. Taki","doi":"10.1109/IEMENTech48150.2019.8981275","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981275","url":null,"abstract":"Full adder is the basic building block of all computing systems. Various Full adder circuits have been presented here, which are uniquely designed using FINFET based Threshold Logic gates. These Full Adders consist of Ganged/ output wired FINFET based Inverter, Capacitive output wired logic (COWL) and Beta-driven threshold logic circuits. The designed circuits are compared on several important parameters e.g., time delay, power consumed by an unit cell and the number of transistor used in a cell. Here FINFET based simulations have been carried using LTSPICE for 45nm and 32nm technology. Some interesting properties have been observed in the simulations. Capacitive output wired logic based full adder cell shows the best performance with respect to transistor count, delay, average power and power delay product.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123714422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Deepak Kr. Jarwal, K. Baral, Ashutosh Kumar Singh, P. Singh, S. Jit
{"title":"New Topologies of a Lossless Grounded Negative Inductor Using Single CDBA","authors":"Deepak Kr. Jarwal, K. Baral, Ashutosh Kumar Singh, P. Singh, S. Jit","doi":"10.1109/IEMENTech48150.2019.8981374","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981374","url":null,"abstract":"In this paper, two new types of lossless grounded negative inductance simulator circuit topologies are proposed. The proposed topologies utilize one current differencing buffered amplifier (CDBA) block and some passive components. The active block CDBA incorporates advantage of both current mode (CM) and voltage mode (VM) which gives flexibility to operate both in CM and VM. The first topology is conditional and the second one is unconditional lossless grounded negative inductor. At last, a second order sinusoidal oscillator circuit and a band pass filter are constructed using the proposed lossless negative inductance simulator. PSPICE simulation results are included to verify theory.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128898374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and Development of an ARM Based Analog Data Acquisition System for Electron Cyclotron Resonance Ion Source","authors":"M. Chatterjee, P. Y. Nabhiraj","doi":"10.1109/IEMENTech48150.2019.8981095","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981095","url":null,"abstract":"A general purpose ARM based analog data acquisition module has been designed and developed. It features four numbers of analog input and output channels with both voltage and current input and output having 16bit resolution and about 100ppm stability. An ARM9 based single board computer (SBC) has been used as a (Inter Integrated Circuit) I2C master with which the ADC and DAC are connected as slaves. A current to voltage converter circuit has been implemented to read the field current in the range of µA to µA. The data acquisition module works as a TCP/IP server and can be communicated from any client computer placed on the same network. The design, development and application of this module will be described in this paper.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129966389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of Power Efficient Fault Tolerant Registers using Modified Hybrid Protection Technique","authors":"Meghana M Katti, Sonali Agrawal","doi":"10.1109/IEMENTech48150.2019.8981130","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981130","url":null,"abstract":"This paper proposes modified Hybrid Protection techniques to design fault tolerant registers using combination of Triple Modular Redundancy (TMR), Single Error Correcting (SEC) codes and Double Error Detecting (DED) codes, which are necessary to be implemented because of the modern-day soft errors that occur due to radiation. Using these techniques, the circuit area, consumption of power and timing are main constraints, when applied on Application Specific Integrated Circuits (ASIC) which is mainly dependent on design requirements. This paper brings in the idea of modified Hybrid Technique-I which introduces a combination of TMR on higher activity bits of a register and SEC-SEC on lower activity bits, and modified Hybrid Technique-II where TMR is applied on higher activity bits and SEC-DED on lower activity bits based on the threshold, set for division of register with respect to activity factor. This leads to the achievement of increase in number of bits which can be corrected in any register with 24.5% and 64.7% decrease in power overhead in modified Hybrid technique I and II respectively as compared to existing hybrid protection technique.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121659366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. K. Rana, Naomi Mallik, N. Sah, C. Choudhuri, Soumi Karmakar
{"title":"Grid Synchronized Solar Micro-Inverter","authors":"T. K. Rana, Naomi Mallik, N. Sah, C. Choudhuri, Soumi Karmakar","doi":"10.1109/IEMENTech48150.2019.8981216","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981216","url":null,"abstract":"Normal solar power inverter uses a series parallel combination of solar PV modules to boost the power level at the DC side. A single inverter is used to generate AC power. This type of configuration suffers from partial shading of PV modules that reduces the output generation level. Secondly, during maintenance or breakdown period, total power generation stops. In the proposed system a small inverter is connected with each PV module. The generated AC power from the modules is added at the AC side to boost the power level. Partial shading or breakdown of one or two inverters will not hamper the main production of power. Secondly, replacement of a micro inverter is very easy. Boosting of power needs only adding micro-inverter whereas single inverter based system needs to replace the inverter itself which is very costly. Since the cost of a micro-inverter is very less, one can keep extra standby unit for replacement. Though the initial investment of a micro-inverter based power system will be higher but it can be shown that it is cost effective if we think of more than 2–3 years of use. Each unit continuously senses the voltage, frequency and phase of the grid supply and tracks the generated output voltage accordingly. Three phase configuration also can be achieved by grouping the inverters and connecting those to three phase lines separately. The inverters cover IP 65 specifications thus placing these on rooftop is not a problem. Convention inverter uses high voltage DC at the inverter. Bringing high voltage DC to domestic areas is also a risky affair. The micro-inverter eliminates the problem as it handles low DC voltage at its input. PLCC based communication will be used to monitor the condition of power generation from each inverter from a remote place.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126212138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Bandyopadhayay, Rohan Basak, Ipshita Pal, Tithi Ghosh
{"title":"Prevention of Road Accidents by Interconnecting Vehicles Using the Concept of Light Fidelity","authors":"A. Bandyopadhayay, Rohan Basak, Ipshita Pal, Tithi Ghosh","doi":"10.1109/IEMENTech48150.2019.8981134","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981134","url":null,"abstract":"According to the World Health Organization, more than 1.25 million people die every year as a result of road traffic accidents. One of the main reasons of the accidents as analysed is due to exceeding the limit of driving speed. Our objective is to present an efficient, practically feasible and low-cost Light-Fidelity (LI-FI) based solution to limit the speed of a vehicle automatically, thereby minimizing the collision. The vehicle continuously monitors the distance of the front vehicle or obstruction using infrared transmitter and receiver and accordingly restricts its maximum speed limit of the vehicle with the help of Electronic Control Unit (ECU) present in the vehicle that checks the flow of fuel into the engine. Li-Fi or light fidelity is a bidirectional and fully networked wireless communications medium which uses light from light-emitting diodes (LEDs) and provides transmission of data through illumination by sending data through a LED light bulb that varies in frequency faster than the human eye can follow. It can provide connectivity within a very large area with more security and with higher data rates and high speed than data that can be transmitted through Wi-Fi, It uses visible light communication or infra-red and near ultraviolet spectrum which works by changing the frequency of the dispersed light. This change in frequency is characterised by a chain of adjoining reactions. By using Li-Fi technology highly reliable vehicle to vehicle communication is possible by transmitting and receiving data through LED head-lights and tail-lights.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129220255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"AODV-DSR Hybrid Reactive Routing Protocol and its Generalization for Mobile Ad-Hoc Networks","authors":"A. Biswas, Mou Dasgupta","doi":"10.1109/IEMENTech48150.2019.8981052","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981052","url":null,"abstract":"Mobile Ad-hoc networks (MANETs) play a vital role in wireless communication, and their efficient deployment and uses require effective routing protocol workable in highly resource limited environment. This paper proposes a hybrid reactive routing protocol using AODV and DSR as they are two representative routing protocols for MANET. Both follow the same RREQ and RREP messages for on-demand route establishment, however, they use different tactics for keeping route information─ one considers forward- and reverse-links and other uses all intermediate nodes for data transmission. In this paper, we combine both of them and propose a hybrid routing protocol comprising links and path-nodes, and as a result, it becomes more reliable and efficient routing protocol than either of them. In addition, it is shown that the proposed hybrid routing is a generalization of AODV and DSR. We provide detail performance analysis of our hybrid protocol.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132363587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nirupama Das, Indira Chatterjee, Anuraag Misra, Chirag Roy, S. Srivasatava
{"title":"Fibre Optic Analog Signal Link for the Electron Cyclotron Resonance Ion Sources","authors":"Nirupama Das, Indira Chatterjee, Anuraag Misra, Chirag Roy, S. Srivasatava","doi":"10.1109/IEMENTech48150.2019.8981060","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981060","url":null,"abstract":"Electron cyclotron resonance ion sources are very important systems to obtain highly energetic ions from the cyclotrons. The analog and digital signals should be sent to the control system for controlling and monitoring the operating parameters of the ion source. Due to the presence of harsh electromagnetic interference and high-voltages, a reliable analog fiber-optic signal link should be used in the ion source. According to the ECR ion source requirements, two analog fiberoptic signal links using voltage-to-frequency and frequency-to-voltage conversion circuits based on IC AD650 have been designed and developed. The test results indicate that the developed signal links for ECR ion sources are accurate and reliable.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131050623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Precision Agriculture System Using Verilog Hardware Description Language to Design an ASIC","authors":"J. Patidar, R. Khatri, R. Gurjar","doi":"10.1109/IEMENTech48150.2019.8981128","DOIUrl":"https://doi.org/10.1109/IEMENTech48150.2019.8981128","url":null,"abstract":"Objective of this paper to explain how traditional agriculture in India can be replaced with smart and precision agriculture by controlling different parameter using programmed hardware through Verilog hardware description language with available sensor network data to develop an ASIC. There are different parameters which are responsible for growth of plant, by controlling that parameter production and growth of plant can be improved rapidly in compare of traditional agriculture Issue in traditional agriculture can easily remove through precision agriculture based network. Using precision agriculture organic farming can possible so disease cause by inorganic farming can overcome easily. Water supply in traditional agriculture is more than need of plant so more energy consume to supply more water, using precision agriculture water supply according to need of plant so energy conservation possible. Data analysis of agriculture sector can give correct information about consumption and production of different crops, vegetables, fruits. According to data analysis farmer can easily grow different crops according to demand with the help of precision agriculture.","PeriodicalId":243805,"journal":{"name":"2019 3rd International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131063381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}