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2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)最新文献

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A Centralized Multi-String PV System Control with Multi-Dimensional MPPT Control 基于多维MPPT控制的多串光伏系统集中控制
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090391
Imran Pervez, Charalampos Antoniadis, Hakim Ghazzai, Y. Massoud
{"title":"A Centralized Multi-String PV System Control with Multi-Dimensional MPPT Control","authors":"Imran Pervez, Charalampos Antoniadis, Hakim Ghazzai, Y. Massoud","doi":"10.1109/APCCAS55924.2022.10090391","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090391","url":null,"abstract":"This paper proposes an improved Maximum Power Point Tracking (MPPT) control for the inverter's photovoltaic (PV) string connection. This is achieved by replacing MPPT control microcontrollers across each PV string with a single central microcontroller controlling all PV strings' Maximum Power Point (MPP). The proposed system, in addition to making the PV string system more power efficient, also reduces the overall system cost. However, replacing multiple controllers across each string with a single central controller makes the MPPT problem multi-dimensional, increasing the complexity. To solve this, we first used the Jaya algorithm for solving the multi-dimensional MPPT problem. Then, the proposed Multi-Dimensional MPPT (MDMPPT) Jaya is compared to another metaheuristic, the Particle Swarm Optimization (PSO), and a conventional algorithm, the Perturb and Observe (P&O). The results prove the superiority of the proposed Jaya algorithm over PSO and P&O.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130032496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low Noise TIA with Continuous Time-Gain Compensation for Ultrasound Transducers 具有连续时间增益补偿的超声换能器低噪声TIA
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090351
Xinwei Yu, Fan Ye, Junyan Ren
{"title":"A Low Noise TIA with Continuous Time-Gain Compensation for Ultrasound Transducers","authors":"Xinwei Yu, Fan Ye, Junyan Ren","doi":"10.1109/APCCAS55924.2022.10090351","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090351","url":null,"abstract":"This paper presents a low noise power-efficient TIA for capacitive-micromachined-ultrasonic transducers (CMUT) to ensure the high-quality ocular ultrasound images. Implemented in CMOS technology, the TIA adopts a source input structure to achieve broadband impedance matching. The use of noise cancellation and capacitive feedback optimizes the noise performance of the amplifier. A continuous time-gain compensation circuit is built in the TIA by adjusting the positive and negative resistance loads, which are composed of the voltage -controlled MOS array. Simulation results show that the TIA achieves a $boldsymbol{1.9}mathbf{pA}/sqrt{}$ Hz input referred noise at 18MHz center frequency of the echoes while consuming only 0.18mW.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126434012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A High-Precision PVT-Tolerance Adaptive Clock Circuit Over Wide Frequencies in 28nm CMOS 一种高精度宽频率pvt容差自适应时钟电路
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090336
Yuqiang Cui, Weiwei Shan
{"title":"A High-Precision PVT-Tolerance Adaptive Clock Circuit Over Wide Frequencies in 28nm CMOS","authors":"Yuqiang Cui, Weiwei Shan","doi":"10.1109/APCCAS55924.2022.10090336","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090336","url":null,"abstract":"The adaptive clock circuit provides the deferred reference clocks for the adaptive voltage-frequency scaling (AVFS) system. However, coping with the high-precision demands of reference clocks remains a challenge. To address these issues, this paper presents an adaptive clock circuit for the AVFS system consisting of a time-to-digital converter, a configurable delay chain, and a code-to-code converter. We implement 3 technologies to improve performance: 1) a multi-level configurable delay chain (CDC) is adopted to obtain a wide range of operating frequencies; 2) the source/drain capacitance of an NMOS transistor operates as a unit load capacitance to achieve ultra-fine delay adjustment; 3) one-hot transmission gate multiplexers are adopted to reduce the propagation latency deviation from multiplexers' input ports to the output's. Verified in 28nm process, simulation results show that the proposed circuit achieves a precision of 0.172ps at TT0.9V25°C, which reduces the impact of PVT variations.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117135588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
3D Autonomous Navigation of UAVs: An Energy-Efficient and Collision-Free Deep Reinforcement Learning Approach 无人机三维自主导航:一种节能、无碰撞的深度强化学习方法
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090255
Yubin Wang, Karnika Biswas, Liwen Zhang, Hakim Ghazzai, Y. Massoud
{"title":"3D Autonomous Navigation of UAVs: An Energy-Efficient and Collision-Free Deep Reinforcement Learning Approach","authors":"Yubin Wang, Karnika Biswas, Liwen Zhang, Hakim Ghazzai, Y. Massoud","doi":"10.1109/APCCAS55924.2022.10090255","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090255","url":null,"abstract":"Energy consumption optimization is crucial for the navigation of Unmanned Aerial Vehicles (UAV), as they operate solely on battery power and have limited access to charging stations. In this paper, a novel deep reinforcement learning-based architecture has been proposed for planning energy-efficient and collision-free paths for a quadrotor UAV. The proposed method uses a unique combination of remaining flight distance and local knowledge of energy expenditure to compute an optimized route. An information graph is used to map the environment in three dimensions and obstacles inside a pre-determined neighbourhood of the UAV are removed to obtain a local as well as collision-free reachable space. Attention-based neural network forms the key element of the proposed reinforcement learning mechanism, that trains the UAV to autonomously generate the optimized route using partial knowledge of the environment, following the trajectories from which, the UAV is driven by the trajectory tracking controller.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132468733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Total Dose and Single Event Effects on 16 Mbit Standalone Spin-Transfer Torque MRAM with 45 nm CMOS Technology 45纳米CMOS技术对16mbit独立自旋转移转矩MRAM的总剂量和单事件效应
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090320
Anni Cao, Xin Li, Liang Wang, Jianpeng Zhang, Chunliang Gou, Liquan Liu, Bi Wang, Xing Zhang, Yuanfu Zhao
{"title":"Total Dose and Single Event Effects on 16 Mbit Standalone Spin-Transfer Torque MRAM with 45 nm CMOS Technology","authors":"Anni Cao, Xin Li, Liang Wang, Jianpeng Zhang, Chunliang Gou, Liquan Liu, Bi Wang, Xing Zhang, Yuanfu Zhao","doi":"10.1109/APCCAS55924.2022.10090320","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090320","url":null,"abstract":"Magnetic Random Access Memory (MRAM) is regarded as one of the most promising memory solutions for space missions since the storage mechanism of magnetic tunnel junction (MTJ) as the memory unit is naturally insensitive to the radiation effects. For the application of highly reliable MRAM., the total dose and ion beam radiation responses of a commercial STT-MRAM are evaluated in this work. The results indicate that MTJ is inherently radiation tolerant, while the peripheral circuit exhibits soft errors during ion beam irradiation. We analyze the single event effect (SEE) and look into the soft errors caused by the single event upset (SEU). Finally, considering the special STT-MRAM architecture, possible inducements of the experimental phenomena are discussed.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130915987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Key Features Selection of Power System Operation Via Improved Clustering Algorithm 基于改进聚类算法的电力系统运行关键特征选择
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090368
Xundong Gong, Yifan Zuo, Yu Zhang, Ming Chen, Haicheng Tu
{"title":"Key Features Selection of Power System Operation Via Improved Clustering Algorithm","authors":"Xundong Gong, Yifan Zuo, Yu Zhang, Ming Chen, Haicheng Tu","doi":"10.1109/APCCAS55924.2022.10090368","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090368","url":null,"abstract":"Based on the advanced information technology, it has become an important topic to develop smart grid with big data playing a leading role. However, with increase of data dimension, the problems of dimensional disaster and sparse information become increasingly prominent. In this paper, we proposed an improved the clustering algorithm, which combines the partial priority clustering and clustering ensemble algorithm, to reduce the data dimension and select the key features of power big data. The case studies are based on the load data of residential areas in multiple states of the United States. The simulation results show that the proposed algorithm can quickly determine clustering center and effectively control the number of clusters. Moreover, the improved algorithm can largely reduce the time complexity, and does not produce any intermediate variables. It is useful for precise features selection and less space occupation.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"184 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128489177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 26-38GHz Ultra-Wideband Balanced Frequency Doubler in 0.15µ m GaAs pHEMT Process 基于0.15µm GaAs pHEMT工艺的26-38GHz超宽带平衡倍频器
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090344
Wen-Ye Liu, Tianxiang Wu, Tianyang Yan, Fan Yang, Yong Chen, Shunli Ma
{"title":"A 26-38GHz Ultra-Wideband Balanced Frequency Doubler in 0.15µ m GaAs pHEMT Process","authors":"Wen-Ye Liu, Tianxiang Wu, Tianyang Yan, Fan Yang, Yong Chen, Shunli Ma","doi":"10.1109/APCCAS55924.2022.10090344","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090344","url":null,"abstract":"This paper reports the analysis and design of a 26-38GHz balanced frequency doubler. The balanced frequency doubler eliminates odd harmonics by using the characteristics of the circuit. We employ a cascade of two-stage amplifiers to increase output power, and a transformer-based magnetic-coupled resonator (MCR) matching technique to widen the bandwidth. Besides, the transformer can realize the single-ended to differential conversion without penalizing additional power consumption. The frequency doubler is designed in a 0.15 µm GaAs pHEMT process. Post-layout simulation results show that the output power is greater than 10dBm over 26-38GHz, and the fundamental-to-harmonic suppression is greater than 15 dBc. The DC power consumption is 23 mA at a 5-V supply. The chip area is 0.75×1.55 mm2.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131618891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Frequency-Selective Limiting Using Automatic Gain Control of Stagger-Tuned N-Path Filters 采用交错调谐n路滤波器自动增益控制的频率选择限制
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090319
M. M. H. Sajeeb, Loai G. Salem
{"title":"Frequency-Selective Limiting Using Automatic Gain Control of Stagger-Tuned N-Path Filters","authors":"M. M. H. Sajeeb, Loai G. Salem","doi":"10.1109/APCCAS55924.2022.10090319","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090319","url":null,"abstract":"This paper presents a linear self-adaptive N-path filter that can autonomously adjust its gain according to the average rather than the instantaneous power level of the signals present in its passband. Instead of relying on a nonlinear limiting mechanism, an automatic gain control loop adjusts the gain of a 4th-order filter by modulating the frequency separation between its comprising 2nd-order filters to attenuate passband signals exceeding the loop programmable limiting threshold. The proposed self-adaptive filter offers better performance in several aspects over prior adaptive filters. Simulation results using 0.18-μm CMOS technology demonstrate that the self-adaptive filter can provide a programmable limiting threshold level down to −30 dBm that does not drift with the local oscillator frequency. Thanks to the piecewise constant gain, the proposed autonomous filter provides an in-band IIP3 that is 3.6 dB higher than prior adaptive filters.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123071486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Time Skew Calibration for Time-Interleaved Analog-to-Digital Converters 时间交错模数转换器的时间偏差校准
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090302
Min Hu, Pengxing Yi, Biting Lei, Wentao Lin
{"title":"Time Skew Calibration for Time-Interleaved Analog-to-Digital Converters","authors":"Min Hu, Pengxing Yi, Biting Lei, Wentao Lin","doi":"10.1109/APCCAS55924.2022.10090302","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090302","url":null,"abstract":"This paper presents an all-digital extraction method for time skew in the time interleaved analog-to-digital converters. Firstly, the fractional delay filter is used to construct the reference of extraction time skew. Secondly, a time-varying step and sign-sign gradient descent least mean squares algorithm is applied to extract time skew. Thirdly, an appropriate window function is designed to make the bandwidth of fractional delay filter larger. Finally, time-varying steps and iterations-varying samples reduce the power consumption of estimation in the LMS algorithm. The advantage of the proposed technique is that it doesn't require additional hardware reference and has low power consumption, fast convergence rate, strong portability.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128155909","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SME: A Systolic Multiply-accumulate Engine for MLP-based Neural Network 基于mlp的神经网络的收缩乘法累积引擎
2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090307
Haochuan Wan, Chaolin Rao, Yueyang Zheng, Pingqiang Zhou, Xin Lou
{"title":"SME: A Systolic Multiply-accumulate Engine for MLP-based Neural Network","authors":"Haochuan Wan, Chaolin Rao, Yueyang Zheng, Pingqiang Zhou, Xin Lou","doi":"10.1109/APCCAS55924.2022.10090307","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090307","url":null,"abstract":"In this paper, we propose an output stationary systolic multiply-accumulate engine (SME) with an optimized dataflow for multilayer perceptron (MLP) computation in the state-of-the-art Neural Radiance Field (NeRF) algorithms. We also analyze activation patterns of the NeRF algorithm which uses ReLU as the activation function, and find that the activation can be sparse, especially in the last several layers. We therefore further take advantage of activation sparsity by gating corresponding multiplications in the SME for power saving. The proposed SME is implemented using SpinalHDL, which is translated to VerilogHDL for VLSI implementation based on 40nm CMOS technology. Evaluation results show that, working at 400MHz, the proposed SME occupies 31.371mm2 circuit area, and consumes 873.7mW power, translating 12,708.10 ksamples/J and 360.06 ksamples/s/mm2.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116905265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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