2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)最新文献

A High Throughput and Configurable Pseudo-random Number Extension Generator for Lattice-based Post-quantum Cryptography 基于格的后量子密码的高吞吐量可配置伪随机数扩展发生器

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090267

Xiang Li, Dongsheng Liu, Ang Hu, Aobo Li, Shuo Yang, Jiahao Lu, Jianming Lei

{"title":"A High Throughput and Configurable Pseudo-random Number Extension Generator for Lattice-based Post-quantum Cryptography","authors":"Xiang Li, Dongsheng Liu, Ang Hu, Aobo Li, Shuo Yang, Jiahao Lu, Jianming Lei","doi":"10.1109/APCCAS55924.2022.10090267","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090267","url":null,"abstract":"Pseudo-random number extension and hashing limit the time for encryption and decryption in multiple lattice-based post-quantum cryptography (PQC). Keccak is a crucial part in pseudo-random number extension and hashing, being the most restrictive module. With the requirement of high-performance, it is important to implement a configurable Keccak core with flexibility and high throughput. In this paper, a novel structure of high throughput pseudo-random number extension generator is proposed. The method utilizes two-stage series round function circuits to reduce cycles in half. And benefiting from combining the p, π, σ, and I steps into a single step in the Keccak, the logic resource overhead is reduced. It can be configured to support multiple sampling strategies including central binomial distribution and rejection. This work is implemented on ZYNQ UltraScale+ FPGA platform with the highest throughput of 11.7Gbps. Compared to related works, the high-throughput and configurability make the proposed pseudo-random number extension generator suitable for various lattice-based cryptographic schemes.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125100205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An Improved Multi-Objective Optimization Framework for Soft-Error Immune Circuits 一种改进的软误差免疫电路多目标优化框架

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090258

Shaohang Chu, Yan Li, Xu Cheng, Xiaoyang Zeng

引用次数: 0

Design and Optimization of Inductive Coils for 2FSK-based Power and Data Transmission for Biomedical Implants 基于2fsk的生物医学植入物功率和数据传输电感线圈的设计与优化

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090401

Wending Qi, Anning Liu, Ruolin Zhou, Songping Mai

{"title":"Design and Optimization of Inductive Coils for 2FSK-based Power and Data Transmission for Biomedical Implants","authors":"Wending Qi, Anning Liu, Ruolin Zhou, Songping Mai","doi":"10.1109/APCCAS55924.2022.10090401","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090401","url":null,"abstract":"The next-generation of neural prostheses such as optogenetic cochlear implants (CIs) can be implemented by a 2FSK-based wireless power and data transfer (WPDT) system over a signal inductive link. Optimizing the power efficiency of the link is imperative to minimize the heating dissipation in tissue and interference with other devices. And to mimic natural auditory perception with high fidelity, data rate is also important. Previous design methodologies for coils are not comprehensive and accurate enough to account for data transmission and operation at dual carrier frequencies. We outline the theoretical foundation of optimal power transmission and compromise it with data transmission. We use this foundation to propose an iterative dual frequencies coils (DFC) design procedure for 2FSK-based WPDT system. Moreover, we execute this procedure at 3.951 and 4.516 MHz achieving power transfer efficiency (PTE) and power deliver to the load (PDL) of 77.4% and 230.25mW respectively, and the data rate reaches 564 Kbps, at 12mm spacing. All results are verified with simulations using MATLAB and measurements using helical coils fabricated on printed circuit boards.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"179 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116395507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4th-Order Gain-Boosted N-Path LNA 基于4阶增益增强n径LNA的32dBm OOB-IIP3 bw扩展5G-NR接收机

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090370

Zhixiang Liu, Shiyou Wei, Gengzhen Qi, Pui-in Mak

引用次数: 0

A High-Time-Resolution Time-to-Digital Converter Using Coupled Ring Oscillator with Phase Averaging 采用相位平均耦合环振荡器的高时间分辨率时数转换器

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090266

Daiki Ogata, R. Kamiya, Yusuke Toyoshima, K. Ohhata

引用次数: 0

Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits 基于自旋轨道转矩辅助磁隧道结的高速数字电路隐性硬件木马建模

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090353

R. Kumar, Divyanshu Divyanshu, Danial Khan, S. Amara, Y. Massoud

{"title":"Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits","authors":"R. Kumar, Divyanshu Divyanshu, Danial Khan, S. Amara, Y. Massoud","doi":"10.1109/APCCAS55924.2022.10090353","DOIUrl":"https://doi.org/10.1109/APCCAS55924.2022.10090353","url":null,"abstract":"This work explores spin-orbit torque (SOT) assisted magnetic tunnel junction (MTJ) as a potential candidate for designing sneaky hardware Trojan (HT). The type of payload targeted is IC malfunction using an externally triggered activation mechanism with an external magnetic field. To make it sneakier, we designed the Trojan to have sufficient tolerance to stray magnetic fields and thermal stability to ensure better-hidden operation for temperature-based tests during system-on-a-chip (SoC) flow. For creating a smaller Trojan, the energy barrier height's effect must be considered. Therefore, an appropriate optimization for SOT-assisted MTJ is required. This work thus considers the effect of process variation in key MTJ parameters by using Monte-Carlo (MC) simulations, and the effect of temperature sweep is utilized to determine the operational ability of the Trojan. We also conclude the Trojan optimization design by analysing its behaviour for high-speed IC operation by performing eye-diagram tests and transient analysis measurements for more practical applications. This work shows that a 5% reduction in MTJ key dimensions for Trojan operation has around 58.87% reduction in the critical magnetic field required for triggering with sufficient tolerance to process variation. Thus, this work contributes towards optimization of hardware Trojan for more sneaky operation.","PeriodicalId":243739,"journal":{"name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129716617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Study on Single Event Burnout Effect for 18V LDMOS Based on 0.18µm Process Technology 基于0.18µm工艺技术的18V LDMOS单事件烧坏效应研究

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090399

Langtao Chen, Xin Zhou, Ying Wang, Ying Kong, R. Xie, Ling Peng, Yantu Mo, M. Qiao, Bo Zhang

引用次数: 0

Low-Complexity Parallel Syndrome Computation for BCH Decoders Based on Cyclotomic FFT 基于环切FFT的BCH译码器低复杂度并行综合征计算

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090385

Xinyuan Qiao, Keyue Deng, Yuxing Chen, Suwen Song, Zhongfeng Wang

引用次数: 1

A Low-Noise Neural Signal Amplifier Achieving 1.6 NEF and 2.56 PEF for Brain-Machine Interface 实现1.6 NEF和2.56 PEF的脑机接口低噪声神经信号放大器

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090394

Weijian Chen, Xu Liu, Weisong Liang, Ze-Xi Lu, Peiyuan Wan, Zhijie Chen

引用次数: 0

Unsupervised Image Dataset Annotation Framework for Snow Covered Road Networks 积雪路网无监督图像数据集标注框架

2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Pub Date : 2022-11-11 DOI: 10.1109/APCCAS55924.2022.10090274

Mohamed Karaa, Hakim Ghazzai, Lokman Sboui, Hichem Besbes, Y. Massoud

引用次数: 1