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15-27 GHz pseudo-noise UWB transmitter for short-range automotive radar in a production SiGe technology 用于近程汽车雷达的15-27 GHz伪噪声UWB发射机
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541613
H. Veenstra, E. V. D. Heijden, D. V. Goor
{"title":"15-27 GHz pseudo-noise UWB transmitter for short-range automotive radar in a production SiGe technology","authors":"H. Veenstra, E. V. D. Heijden, D. V. Goor","doi":"10.1109/ESSCIR.2005.1541613","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541613","url":null,"abstract":"Short-range radar is a technology that potentially can help to enhance road safety. Recently, in the USA as well as in Europe, frequency bands around 24 GHz have been opened up for automotive radar applications. This paper describes an ultra-wideband (UWB) transmit path in a production 0.25 /spl mu/m SiGe BiCMOS IC technology. The UWB signal is generated by means of biphase modulation of a 24 GHz carrier with a pseudo-noise data signal. When no digital modulation signal is applied, the IC can be used for FM-CW modulation. The transmit path supports pseudo-noise biphase modulation up to 2 Gb/s data rates and generates an unmodulated output power between 2 and 5 dBm differentially for frequencies between 15-27 GHz. The 0.80/spl times/0.66 mm/sup 2/ IC dissipates 168 mW from a 3.3V supply.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124657405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substrates 针对高电阻率SOI衬底优化的低功耗5ghz CMOS LC-VCO
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541643
P. Delatte, G. Picun, L. Demeus, P. Simon, D. Flandre
{"title":"A low-power 5 GHz CMOS LC-VCO optimized for high-resistivity SOI substrates","authors":"P. Delatte, G. Picun, L. Demeus, P. Simon, D. Flandre","doi":"10.1109/ESSCIR.2005.1541643","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541643","url":null,"abstract":"This paper discusses the power saving of an LC-VCO designed on high-resistivity SOI substrates (/spl rho/ > 1000/spl Omega//spl middot/cm). It demonstrates the drastic improvement in the varactors and inductors quality factor on these substrates. It stresses on the importance of optimizing the tank inductor and the VCO for high-resistivity substrates. A 5GHz VCO designed in a 0.13/spl mu/m partially depleted SOI CMOS confirms the low-power performance with a figure-of-merit greater than 190, placing this design at the top of the state-of-the-art.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116190866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
Ultra low-power analog Morlet wavelet filter in 0.18 /spl mu/m BiCMOS technology 超低功耗模拟Morlet小波滤波器采用0.18 /spl mu/m BiCMOS技术
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541625
S. Haddad, Joël M. H. Karel, R. Peeters, R. Westra, W. Serdijn
{"title":"Ultra low-power analog Morlet wavelet filter in 0.18 /spl mu/m BiCMOS technology","authors":"S. Haddad, Joël M. H. Karel, R. Peeters, R. Westra, W. Serdijn","doi":"10.1109/ESSCIR.2005.1541625","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541625","url":null,"abstract":"A novel procedure to implement the wavelet transform using analog circuitry is presented. First, an approximation is used to calculate the transfer function of the filter, whose impulse response is the required wavelet. Next, to meet low-power low-voltage requirements, we optimize the state-space description of the filter with respect to dynamic range, sensitivity and sparsity. The filter design that follows is based on an orthonormal ladder structure and employs log-domain integrators as main building blocks. Measurements demonstrate that it approximates the required wavelet base (i.e. Morlet) in an excellent way. The tenth-order log-domain filter operates from a 1.5-V supply voltage and a total bias current of 4.3/spl mu/A.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121313590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A PWM dual-output DC/DC boost converter in a 0.13/spl mu/m CMOS technology for cellularphone backlight application 一种0.13/spl mu/m CMOS技术的PWM双输出DC/DC升压转换器，用于手机背光应用
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541563
Siew Kuok Hoon, N. Culp, Jun Chen, F. Maloberti
{"title":"A PWM dual-output DC/DC boost converter in a 0.13/spl mu/m CMOS technology for cellularphone backlight application","authors":"Siew Kuok Hoon, N. Culp, Jun Chen, F. Maloberti","doi":"10.1109/ESSCIR.2005.1541563","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541563","url":null,"abstract":"This integrated single inductor dual-output boost DC/DC converter provides two independently regulated outputs with maximum efficiency at 83%. The converter operates in PWM and discontinuous mode at 500kHz using a 6.8uH inductor. Each output is time-multiplexed and regulated via current mode control. A drain-extended 0.13um technology allows backlight application up to 11V operation. The chip occupies 1.56 mm.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121248850","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A 1.2-V CMOS complex bandpass filter with a tunable center frequency 中心频率可调的1.2 v CMOS复杂带通滤波器
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541626
H. Majima, H. Ishikuro, K. Agawa, M. Hamada
{"title":"A 1.2-V CMOS complex bandpass filter with a tunable center frequency","authors":"H. Majima, H. Ishikuro, K. Agawa, M. Hamada","doi":"10.1109/ESSCIR.2005.1541626","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541626","url":null,"abstract":"A 4th-order complex bandpass filter (BPF) with a tunable center frequency is designed and fabricated in a 0.13 /spl mu/m CMOS technology. The transfer function is changeable dynamically. The passband center frequency can be set to 0 Hz, 1 MHz, 1.5 MHz and 2 MHz so that the filter can work as a complex BPF in the receiver path and as a LPF in the transmit path. An opamp-RC filter is used to obtain a wide dynamic range. The filter operates with the supply voltage as low as 1.2 V. The input referred noise for 1.4 MHz band width is 53 /spl mu/Vrms. IIP3 and the image rejection ratio at 1.5 MHz is 25.2 dBm and 52 dB, respectively.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132276826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
100-MS/s 14-b track-and-hold amplifier in 0.18-/spl mu/m CMOS 100毫秒/秒14b跟踪保持放大器在0.18-/spl μ m CMOS
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541609
D. Vecchi, C. Azzolini, A. Boni, F. Chaahoub, L. Crespi
{"title":"100-MS/s 14-b track-and-hold amplifier in 0.18-/spl mu/m CMOS","authors":"D. Vecchi, C. Azzolini, A. Boni, F. Chaahoub, L. Crespi","doi":"10.1109/ESSCIR.2005.1541609","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541609","url":null,"abstract":"The paper describes the design and the implementation of a track-and-hold (THA) amplifier suitable for a 14-b, 100 MS/s A/D converter, in 0.18 /spl mu/m CMOS technology. The THA is based on the flip-around architecture with telescopic cascode OTA. Adequate settling behavior was achieved by means of accurate analysis and design of the boosting amplifier with respect to its impact on the pole-zero placement. A modified bootstrap switch featuring a high linearity and reduced complexity is also presented.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"835 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128137415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A high accurate logarithmic amplifier system with wide input range and extreme low temperature coefficient 高精度、宽输入范围、极低温度系数的对数放大系统
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541615
S. Groiss, M. Koeberle
{"title":"A high accurate logarithmic amplifier system with wide input range and extreme low temperature coefficient","authors":"S. Groiss, M. Koeberle","doi":"10.1109/ESSCIR.2005.1541615","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541615","url":null,"abstract":"A high accurate current amplifier with very precise logarithmic transfer characteristic and extreme high temperature stability is presented. The application of such an amplifier lies on the field of optoelectronic signal processing. With a photo diode connected to the input of the amplifier it is possible to measure any light levels very precisely. The presented circuitry consists of a low leakage current input stage with fixed amplification, a high performance low noise logarithmic amplifier and a low voltage drop current output stage. High temperature stable reference current is generated on chip by a bandgap reference. Minimum input signal level goes down to some 100pA, maximum input signal level up to some 10/spl mu/A. The high precision logarithmic transfer characteristic exceeds four decades, the precision is within 1% over the complete range. The output current is in the order of some 100/spl mu/A, its temperature variation is lower than 3/spl mu/A over the wide temperature range from -40/spl deg/C to 100/spl deg/C. Current consumption of the sensor circuitry is as low as 670/spl mu/A which makes it applicable for low power systems. The circuitry is realized in a standard 0.6/spl mu/m BiCMOS technology on a total chip area of only 1.46mm/sup 2/.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128465185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
SiGe transformer matched power amplifier for operation at millimeter-wave frequencies SiGe变压器匹配功率放大器工作在毫米波频率
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541579
U. Pfeiffer, D. Goren, B. Floyd, S. Reynolds
{"title":"SiGe transformer matched power amplifier for operation at millimeter-wave frequencies","authors":"U. Pfeiffer, D. Goren, B. Floyd, S. Reynolds","doi":"10.1109/ESSCIR.2005.1541579","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541579","url":null,"abstract":"In this paper, a transformer matched power amplifier for operation at millimeter-wave frequencies is presented. The SiGe single-stage push-pull amplifier uses a stacked transformer above a ground shield for output matching. The millimeter-wave transformer has a high coupling factor k = 0.8 and provides a very compact circuit layout. At 61.5 GHz the class-AB biased amplifier achieves a power gain of 12 dB with 8.5 dBm output power at a 1 dB compression. The saturated output power was measured up to P/sub sat/ = 14 dBm with a maximum PAE of 4.2%.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132005930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Offset and dynamic gain-mismatch reduction techniques for 10b 200ms/s parallel pipeline ADCs 10b / 200ms/s并行流水线adc的失调和动态增益失配减小技术
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541677
Seung-Chul Lee, Gyu-Hyun Kim, Jong-Kee Kwon, Jongdae Kim, Seunghoon Lee
{"title":"Offset and dynamic gain-mismatch reduction techniques for 10b 200ms/s parallel pipeline ADCs","authors":"Seung-Chul Lee, Gyu-Hyun Kim, Jong-Kee Kwon, Jongdae Kim, Seunghoon Lee","doi":"10.1109/ESSCIR.2005.1541677","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541677","url":null,"abstract":"This paper describes novel offset, gain-error, and clock-skew minimization techniques for required channel matching of multi-channel ADCs. The proposed adaptive closed-loop offset sampling enhances the operating speed of a parallel pipeline ADC with removed channel offsets. The 10b 200MS/s 0.13/spl mu/m CMOS ADC achieves the SNDR of 55dB for a 21 MHz sinusoidal input at 200MS/S without any other offset calibration. Based on the prototype ADC evaluation, a clock-skew reduction scheme is proposed to improve further the dynamic gain mismatch between channels of parallel ADCs.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128617782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Correlating PIN-photodetector with novel difference-integrator concept for range-finding applications 相关pin光电探测器与新的差分积分器概念的测距应用
Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005. Pub Date : 2005-12-05 DOI: 10.1109/ESSCIR.2005.1541667
A. Nemecek, K. Oberhauser, H. Zimmermann
{"title":"Correlating PIN-photodetector with novel difference-integrator concept for range-finding applications","authors":"A. Nemecek, K. Oberhauser, H. Zimmermann","doi":"10.1109/ESSCIR.2005.1541667","DOIUrl":"https://doi.org/10.1109/ESSCIR.2005.1541667","url":null,"abstract":"Exploiting the benefits of PIN photodiodes, a correlating detector and a novel difference integrator concept were realized in a single-chip range-finder solution. The PIN photodetector performing already internal modulation has a responsivity of R=0.30A/W at 660nm. A bandwidth of f/sub 3dB/=250MHz with correlation gates on thin oxide, respectively 500MHz on field oxide were achieved. Both challenges of the distance measurement - high sensitivity for signals in the order of nW and accuracies of 1.6% (1.7%) for 10m (15m) - could be reached. The measurement range goes from 20cm to 15m. The chip was realized in a modified 0.6nm BiCMOS process. Effective pixel size is /spl sim/250 /spl times/170/spl mu/m/sup 2/ including the photoreceiver of /spl sim/100 /spl times/ 100 /spl mu/m/sup 2/ resulting in a fill factor of /spl sim/24%.","PeriodicalId":239980,"journal":{"name":"Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005.","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114607519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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