2011 41st IEEE International Symposium on Multiple-Valued Logic最新文献

筛选
英文 中文
Error-Correcting Decision Diagrams for Multiple-Valued Functions 多值函数的纠错决策图
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.33
Helena Astola, S. Stankovic, J. Astola
{"title":"Error-Correcting Decision Diagrams for Multiple-Valued Functions","authors":"Helena Astola, S. Stankovic, J. Astola","doi":"10.1109/ISMVL.2011.33","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.33","url":null,"abstract":"Decision diagrams are an efficient way of representing switching functions and they are easily mapped to technology. The layout of a circuit is directly determined by the shape of the decision diagram. By combining the theory of error-correcting codes with decision diagrams, it is possible to form robust circuit layouts, which can detect and correct errors. The method of constructing robust decision diagrams is analogous to the decoding process of linear codes, and can be based on simple matrix and look-up operations. In this paper, we focus on error-correcting decision diagrams for multiple-valued functions, considering them for both the Hamming metric and the Lee metric. The performance of robust decision diagrams is analyzed by determining the error probabilities for such constructions. Depending on the error-correcting properties of the code used in the construction, the error probability of a circuit can be significantly decreased by a robust decision diagram.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129762308","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Recognition of Blurred Images Using Multilayer Neural Network Based on Multi-valued Neurons 基于多值神经元的多层神经网络模糊图像识别
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.24
I. Aizenberg, Shane Alexander, Jacob Jackson
{"title":"Recognition of Blurred Images Using Multilayer Neural Network Based on Multi-valued Neurons","authors":"I. Aizenberg, Shane Alexander, Jacob Jackson","doi":"10.1109/ISMVL.2011.24","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.24","url":null,"abstract":"In this paper, we consider a problem of blurred image recognition using a multilayer neural network based on multi-valued neurons (MLMVN). Recognition of blurred images is a challenging problem because it is difficult or even impossible to find any relevant space of features for solving this problem in the spatial domain. The first crucial point of our approach is the use of the frequency domain as a feature space. Since Fourier phase spectrum of a blurred image remains almost unaffected, at least in the low frequency part, it is possible to use phases corresponding to the lowest frequencies as features for recognition. To preserve the physical nature of phase, it is very important to use a machine learning tool for its analysis that treats the phase properly. MLMVN is based on multi-valued neurons whose inputs and output are located on the unit circle and are determined exactly by phase. This approach makes it possible to recognize even heavily blurred images. Our solution works even for images so degraded they cannot be recognized using traditional image recognition techniques, furthermore, even visually","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"84 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127981427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Invitation to Clone Theory with Partial Clones and Hyperclones 部分克隆和超克隆克隆理论的邀请
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.49
Hajime Machida, L. Haddad, J. Pantović
{"title":"Invitation to Clone Theory with Partial Clones and Hyperclones","authors":"Hajime Machida, L. Haddad, J. Pantović","doi":"10.1109/ISMVL.2011.49","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.49","url":null,"abstract":"Clone theory is motivated by logic (multiple-valued logic), algebra (universal algebra) and computer science (switching and circuit theory). We introduce some fundamental concepts and properties which lie at the bottom of clone theory on a finite set and then present some of more recent results. Particular emphasis is put on partial clones and hyper clones.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114326840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Representation of Multiple-Valued Bent Functions Using Vilenkin-Chrestenson Decision Diagrams 用vilenkin - christensen决策图表示多值弯曲函数
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.62
S. Stankovic, M. Stankovic, J. Astola
{"title":"Representation of Multiple-Valued Bent Functions Using Vilenkin-Chrestenson Decision Diagrams","authors":"S. Stankovic, M. Stankovic, J. Astola","doi":"10.1109/ISMVL.2011.62","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.62","url":null,"abstract":"Bent functions are a class of discrete functions which exhibit the highest degree of nonlinearity. As such bent functions form an essential part of cryptographic systems. Original concept of bent functions defined in GF(2) can be extended to multiple-valued case. Multiple-valued bent functions are defined in therms of properties of their Vilenkin-Chrestenson spectra. Decision diagrams are a method of compact representation of discrete functions. Special types of decision diagrams have been introduced for various types of discrete functions. In this paper we demonstrate how Vilenkin-Chrestenson decision diagrams can be used for efficient representation of multiple-valued bent functions.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"30 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128998029","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Determining Minimized Galois Field Expressions for Ternary Functions 确定三元函数的最小伽罗瓦域表达式
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.26
R. Stankovic, Helena Astola, J. Astola
{"title":"Determining Minimized Galois Field Expressions for Ternary Functions","authors":"R. Stankovic, Helena Astola, J. Astola","doi":"10.1109/ISMVL.2011.26","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.26","url":null,"abstract":"The paper extends the notion of the Special Normal Form (SNF) for Boolean functions to ternary logic functions. An algorithm to minimize the generalized Galois field (GF) expressions for ternary functions by using SNF is presented.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134213595","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Synthesis of Reversible Synchronous Counters 可逆同步计数器的合成
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.25
Mozammel H. A. Khan, M. Perkowski
{"title":"Synthesis of Reversible Synchronous Counters","authors":"Mozammel H. A. Khan, M. Perkowski","doi":"10.1109/ISMVL.2011.25","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.25","url":null,"abstract":"Reversible logic is very important in low-power circuit design and quantum computing. Though a significant number of works has been done on reversible combinational logic synthesis, only few papers have been published on reversible sequential logic synthesis and per mutative quantum automata. The reported works on reversible sequential logic discuss designs of reversible flip-flops and suggest synthesizing reversible sequential circuits by replacing the flip-flops and combinational parts of traditional sequential circuit designs by their reversible counterparts. In this paper, we discuss direct design of reversible synchronous counters based on positive polarity Reed-Muller expressions. Design results show that the direct design method is more efficient than the replacement method. The method can be also applied to per mutative quantum automata that have quantum memories external to the circuit.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"29 28","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133651476","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Improved Complexity of Quantum Oracles for Ternary Grover Algorithm for Graph Coloring 图着色中三元Grover算法的改进复杂度
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.42
Yushi Wang, M. Perkowski
{"title":"Improved Complexity of Quantum Oracles for Ternary Grover Algorithm for Graph Coloring","authors":"Yushi Wang, M. Perkowski","doi":"10.1109/ISMVL.2011.42","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.42","url":null,"abstract":"The paper presents a generalization of the well-known Grover Algorithm to operate on ternary quantum circuits. We compare complexity of oracles and some of their commonly used components for binary and ternary cases and various sizes and densities of colored graphs. We show that ternary encoding leads to quantum circuits that have significantly less qud its and lower quantum costs. In case of serial realization of quantum computers, our ternary algorithms and circuits are also faster.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"57 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114125035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
Entropies on Bounded Lattices 有界格上的熵
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.18
D. Simovici
{"title":"Entropies on Bounded Lattices","authors":"D. Simovici","doi":"10.1109/ISMVL.2011.18","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.18","url":null,"abstract":"We introduce the notion of entropy on arbitrary lattices and we study several of its properties. Explicit forms for entropy are obtained for entropies on graded lattices that satisfy certain regularity conditions. The relationships between entropies and metrics defined on lattices are also explored.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"47 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120905937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Contributions of Arto Salomaa to Multiple-Valued Logic Arto Salomaa对多值逻辑的贡献
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.64
R. Stankovic, J. Astola
{"title":"Contributions of Arto Salomaa to Multiple-Valued Logic","authors":"R. Stankovic, J. Astola","doi":"10.1109/ISMVL.2011.64","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.64","url":null,"abstract":"In scientific community, especially among mathematicians and computer scientists, Arto Salomaa is renowned as a founder of Automata Theory and Formal Languages. It is however less widely known that Salomaa started his research work in the area of multiple-valued logic, where he received his PhD degree in 1960 from the University of Turku, Finland. In this way, research in multiple-valued logic provided foundations for later work of Professor Salomaa. The paper presents a short summary of the work of Arto Salomaa in multiple-valued logic.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121344620","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks 随机分子现象的容错计算范式:Hopfield门和逻辑网络
2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI: 10.1109/ISMVL.2011.21
A. H. Tran, S. Yanushkevich, S. Lyshevski, V. Shmerko
{"title":"Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks","authors":"A. H. Tran, S. Yanushkevich, S. Lyshevski, V. Shmerko","doi":"10.1109/ISMVL.2011.21","DOIUrl":"https://doi.org/10.1109/ISMVL.2011.21","url":null,"abstract":"This paper contributes to robust fault-tolerant computing for expected nano-centric processing hardware. We developed (a)techniques for fault tolerant logic network design given a library of AND, OR, NAND, and NOR Hop field gates, and (b) report experimental results on fault tolerant properties of designed networks. In particular, several hundred iterations are required to achieve correct outputs in a five-input single-output networks in the presence of 40% noise.","PeriodicalId":234611,"journal":{"name":"2011 41st IEEE International Symposium on Multiple-Valued Logic","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130219087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信