2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)最新文献_第9页

Sub-Nanosecond Delay CMOS Active Gate Driver for Closed-Loop $mathrm{d}v/mathrm{d}t$ Control of GaN Transistors GaN晶体管的亚纳秒延迟CMOS有源栅极驱动器的闭环控制

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757693

Plinio Bau, M. Cousineau, B. Cougo, F. Richardeau, S. Vinnac, D. Flumian, N. Rouger

{"title":"Sub-Nanosecond Delay CMOS Active Gate Driver for Closed-Loop $mathrm{d}v/mathrm{d}t$ Control of GaN Transistors","authors":"Plinio Bau, M. Cousineau, B. Cougo, F. Richardeau, S. Vinnac, D. Flumian, N. Rouger","doi":"10.1109/ISPSD.2019.8757693","DOIUrl":"https://doi.org/10.1109/ISPSD.2019.8757693","url":null,"abstract":"This paper presents an AGD (active gate driver) implemented with a low voltage CMOS technology to control the $mathbf{d}boldsymbol{v}/mathbf{d}boldsymbol{t}$ sequence of low voltage (100V) and high voltage (650V) GaN power transistors. Such an AGD can control and reduce the $mathbf{d}boldsymbol{v}/mathbf{d}boldsymbol{t}$ of fast switching GaN devices with a reduced impact on switching losses. In the case of both low voltage and high voltage GaN fast switching transistors, such an AGD must have a total response time lower than 1ns. Therefore, introducing a feedback loop to control the $mathbf{d}boldsymbol{v}/mathbf{d}boldsymbol{t}$ requires a specific design with a very high bandwidth (550MHz). Moreover, probing the $boldsymbol{v}_{mathbf{DS}}$ voltage and its derivative is quite challenging, as the voltage level is higher than the low voltage gate driver supply. The purpose of this work is to optimize a low voltage CMOS AGD with fully integrated functions, and implement such a solution in GaN-based power converters.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"2021 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120920533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mutual inductance influence to switching speed and TDR measurements for separating self- and mutual inductances in the package 在封装中分离自感和互感时，互感对开关速度和TDR测量的影响

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757658

H. Iida, K. Hasegawa, I. Omura

引用次数: 4

A New 200 V Dual Trench MOSFET With Stepped Oxide for Ultra Low RDS(on) 一种用于超低RDS的新型阶梯氧化200 V双沟槽MOSFET (on)

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757572

Chanho Park, M. Azam, Gabriel Dengel, A. Shibib, K. Terrill

引用次数: 10

Revealing the Positive Bias Temperature Instability in Normally-OFF AlGaN/GaN MIS-HFETs by Constant-Capacitance DLTS 用恒电容DLTS揭示常关AlGaN/GaN mishfet的正偏置温度不稳定性

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757587

Sen Huang, Xinhua Wang, Xinyu Liu, X. Kang, Jie Fan, Shu Yang, H. Yin, K. Wei, Yingkui Zheng, Xiaolei Wang, Wenwu Wang, Jingyuan Shi, Hongwei Gao, Qian Sun, K. J. Chen

{"title":"Revealing the Positive Bias Temperature Instability in Normally-OFF AlGaN/GaN MIS-HFETs by Constant-Capacitance DLTS","authors":"Sen Huang, Xinhua Wang, Xinyu Liu, X. Kang, Jie Fan, Shu Yang, H. Yin, K. Wei, Yingkui Zheng, Xiaolei Wang, Wenwu Wang, Jingyuan Shi, Hongwei Gao, Qian Sun, K. J. Chen","doi":"10.1109/ISPSD.2019.8757587","DOIUrl":"https://doi.org/10.1109/ISPSD.2019.8757587","url":null,"abstract":"Effects of oxide/III-nitride interface and oxide states on the threshold voltage instability ($boldsymbol{V}_{mathbf{TH}}$-Instability) of normally-OFF Al2O3/AlGaN/GaN MIS-HFETs, i.e., metal-insulator-semiconductor heterojunction field-effect transistors, were revealed by constant-capacitance deep level transient spectroscopy (CC-DLTS). It is confirmed that a technique of in-situ remote plasma pretreatments could effectively suppress the $boldsymbol{D}_{mathbf{it}}$ with level depth ($boldsymbol{E}_{mathbf{C}}-boldsymbol{E}_{mathbf{T}}$) larger than 0.4 eV down to below $1.3times 10^{12} mathbf{cm}^{-2}mathbf{eV}^{-1}$, in spite of the presence of a discrete level with $boldsymbol{E}_{mathbf{C}}-boldsymbol{E}_{mathbf{T}}$ and capture cross section ($boldsymbol{sigma}_{mathbf{n}}$) being 0.33 eV and $4.0times 10^{-15} mathbf{cm}^{2}$ respectively. However, electron charging of oxide states occurs when the MIS-HFETs are pulsed by a high positive gate bias (e.g., > 8 V), as confirmed by a reduced tunnel constant $boldsymbol{d}_{0}$ of 0.79 nm. High electric field induced tunnel filling of gate oxide states could be an assignable cause for the positive bias temperature instability in normally-OFF III-nitride MIS-HFETs.","PeriodicalId":225029,"journal":{"name":"2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133336462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

A Novel All-in-One Digital-Analog Heterogeneous Integrated Intelligent Power Module 一种新型一体化数模异构集成智能电源模块

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757581

Y. Lin, K. Kao, C. Tzeng, H. Lin, W. Han, J.Y. Chang, T. Chang

引用次数: 0

Analog Basis, Low-Cost Inverter Output Current Sensing with Tiny PCB Coil Implemented inside IPM 模拟基础，低成本逆变器输出电流传感与微型PCB线圈在IPM内实现

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757580

Battuvshin Bayarkhuu, Bat-Otgon Bat-Ochir, K. Hasegawa, M. Tsukuda, B. Dugarjav, I. Omura

引用次数: 4

Investigation of UIS Capability for −600V Class Vertical SiC p-channel MOSFET −600V级垂直SiC p沟道MOSFET的UIS性能研究

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757607

Kailun Yao, H. Yano, N. Iwamuro

引用次数: 5

A Laterally Monolithic-Integrated Multi-Cascode for Applications with 600V and more based on 20V-FINFETs in 90nm Technology 基于90nm技术的20v finfet的600V及以上应用的横向单片集成多级联码

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757604

Rolf Wei, M. Lemke, M. Müller, R. Rudolf, K. Stahrenberg, T. Bertrams, M. Bartels, A. Mahmoud, N. Nagel

引用次数: 0

Static and Dynamic Figures of Merits (FOM) for Superjunction MOSFETs 超结mosfet的静态和动态优劣图

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757689

H. Kang, F. Udrea

引用次数: 13

Short-Circuit Robustness of 4600 V SiC DMOSFETs 4600 V SiC dmosfet的短路稳健性

2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD) Pub Date : 2019-05-01 DOI: 10.1109/ISPSD.2019.8757686

S. Sundaresan, Stoyan Jeliazkov, V. Mulpuri, R. Singh, Sumit Jadav

引用次数: 3