Investigation of UIS Capability for −600V Class Vertical SiC p-channel MOSFET

Abstract

Vertical planar gate 4H-SiC p-ch SiC MOSFET is fabricated as a potential candidate for complementary power applications. Its unclamped inductive switching (UIS) capability is investigated by measurement and TCAD simulation. The p-ch SiC MOSFET shows a low UIS capability rather than n-ch SiC MOSFET because of the unoptimized termination structure. The UIS capability of p-ch MOSFET can be improved by good design of edge region.