2019 22nd Euromicro Conference on Digital System Design (DSD)最新文献_第6页

Coded Modulation Simulation Framework for Time-of-Flight Cameras 飞行时间相机的编码调制仿真框架

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00095

Armin Schoenlieb, M. Almer, David Lugitsch, C. Steger, G. Holweg, N. Druml

{"title":"Coded Modulation Simulation Framework for Time-of-Flight Cameras","authors":"Armin Schoenlieb, M. Almer, David Lugitsch, C. Steger, G. Holweg, N. Druml","doi":"10.1109/DSD.2019.00095","DOIUrl":"https://doi.org/10.1109/DSD.2019.00095","url":null,"abstract":"In recent years, application fields such as secure face recognition or autonomous driving increased the demand on efficient depth sensing systems. Time-of-Flight (ToF) sensors are well suited for these applications. The measurement principle is based on measuring the phase and consequently the delay of emitted and reflected light. For this delay measurement a continuous wave signal is emitted. Coded modulation replaces this continuous wave signal with code sequences. This enables new possibilities as the measurement range of the camera is adjustable with coded modulation. A well suited way for the characterization of this modulation method is a simulation framework. In this paper, we present a simulation framework for coded modulation ToF imagers. We present a detailed description of our PMD technology. From this theoretical description, we adapt an existing simulation model for coded modulation ToF cameras. The model of the camera considers various different noise sources. Furthermore depth calculation principles of coded modulation are introduced. As our evaluation shows, our framework is able to simulate real life behavior of coded modulation. Furthermore we are able to model the correlation form, and consequently the depth and intensity measurement behavior. In the end we evaluate our simulation results with real live measurement data. With this framework easy to use evaluation of coded modulation will enable new applications for this technique.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"399 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132843599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Challenges in Deeply Heterogeneous High Performance Systems 深度异构高性能系统中的挑战

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00068

G. Agosta, W. Fornaciari, David Atienza Alonso, R. Canal, A. Cilardo, J. Flich, Carles Hernández, M. Kulczewski, G. Massari, Rafael Tornero Gavilá, Marina Zapater

{"title":"Challenges in Deeply Heterogeneous High Performance Systems","authors":"G. Agosta, W. Fornaciari, David Atienza Alonso, R. Canal, A. Cilardo, J. Flich, Carles Hernández, M. Kulczewski, G. Massari, Rafael Tornero Gavilá, Marina Zapater","doi":"10.1109/DSD.2019.00068","DOIUrl":"https://doi.org/10.1109/DSD.2019.00068","url":null,"abstract":"RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring new High-Performance Computing (HPC) technologies. RECIPE aims at introducing a hierarchical runtime resource management infrastructure to optimize energy efficiency and minimize the occurrence of thermal hotspots, while enforcing the time constraints imposed by the applications and ensuring reliability for both time-critical and throughput-oriented computation that run on deeply heterogeneous accelerator-based systems. This paper presents a detailed overview of RECIPE, identifying the fundamental challenges as well as the key innovations addressed by the project, which span run-time management, heterogeneous computing architectures, HPC memory/interconnection infrastructures, thermal modelling, reliability, programming models, and timing analysis. For each of these areas, the paper describes the relevant state of the art as well as the specific actions that the project will take to effectively address the identified technological challenges.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115164932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Development of Cyber-Physical Speech-Controlled Wheelchair for Disabled Persons 残疾人网络-物理语言控制轮椅的研制

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00072

A. Škraba, Andrej Kolozvari, D. Kofjac, R. Stojanovic, E. Semenkin, V. Stanovov

引用次数: 5

Keyword Spotting using Time-Domain Features in a Temporal Convolutional Network 基于时域特征的时间卷积网络关键字识别

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00053

Emad A. Ibrahim, J. Huisken, H. Fatemi, J. P. D. Gyvez

{"title":"Keyword Spotting using Time-Domain Features in a Temporal Convolutional Network","authors":"Emad A. Ibrahim, J. Huisken, H. Fatemi, J. P. D. Gyvez","doi":"10.1109/DSD.2019.00053","DOIUrl":"https://doi.org/10.1109/DSD.2019.00053","url":null,"abstract":"With the increasing demand on voice recognition services, more attention is paid to simpler algorithms that are capable to run locally on a hardware device. This paper demonstrates simpler speech features derived in the time-domain for Keyword Spotting (KWS). The features are considered as constrained lag autocorrelations computed on overlapped speech frames to form a 2D map. We refer to this as Multi-Frame Shifted Time Similarity (MFSTS). MFSTS performance is compared against the widely known Mel-Frequency Cepstral Coefficients (MFCC) that are computed in the frequency-domain. A Temporal Convolutional Network (TCN) is designed to classify keywords using both MFCC and MFSTS. This is done by employing an open source dataset from Google Brain, containing ~ 106000 files of one-second recorded words such as, 'Backward', 'Forward', 'Stop' etc. Initial findings show that MFSTS can be used for KWS tasks without visiting the frequency-domain. Our experimental results show that classification of the whole dataset (25 classes) based on MFCC and MFSTS are in a very good agreement. We compare the performance of the TCNbased classifier with other related work in the literature. The classification is performed using small memory footprint (~ 90 KB) and low compute power (~ 5 MOPs) per inference. The achieved classification accuracies are 93.4% using MFCC and 91.2% using MFSTS. Furthermore, a case study is provided for a single-keyword spotting task. The case study demonstrates how MFSTS can be used as a simple preprocessing scheme with small classifiers while achieving as high as 98% accuracy. The compute simplicity of MFSTS makes it attractive for low power KWS applications paving the way for resource-aware solutions.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"12 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120982992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Code is Ethics — Formal Techniques for a Better World 代码是道德规范——创造更美好世界的正式技术

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00011

R. Drechsler, Christoph Lüth

引用次数: 2

Testability of Switching Lattices in the Cellular Fault Model 元胞故障模型中开关格的可测试性

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00054

A. Bernasconi, Valentina Cieiani, L. Frontini

引用次数: 2

An RTL ATPG Flow Using the Gate Inherent Fault (GIF) Model Applied on Non-, Standard- and Random-Access-Scan (RAS) 基于门固有故障(GIF)模型的非、标准和随机访问扫描(RAS) RTL ATPG流

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00018

Tobias Strauch

引用次数: 0

EVC-Based Power Gating Approach to Achieve Low-Power and High Performance NoC 基于evc的功率门控方法实现低功耗高性能NoC

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00027

Peng Wang, Sobhan Niknam, Sheng Ma, Zhiying Wang, T. Stefanov

{"title":"EVC-Based Power Gating Approach to Achieve Low-Power and High Performance NoC","authors":"Peng Wang, Sobhan Niknam, Sheng Ma, Zhiying Wang, T. Stefanov","doi":"10.1109/DSD.2019.00027","DOIUrl":"https://doi.org/10.1109/DSD.2019.00027","url":null,"abstract":"High power consumption becomes the major bottleneck that prevents applying Network-on-Chips (NoCs) on future many-core systems. Power gating is an effective way to reduce the power consumption of a NoC. However, conventional power gating approaches cause significant packet latency increase as well as additional power consumption overhead due to the power gating mechanism. One comprehensive way to reduce these negative impacts is to bypass powered-off routers in a NoC when transferring packets. Therefore, in this paper, we propose an express virtual channel based (EVC-based) power gating approach. In our approach, packets can take pre-defined virtual bypass paths to bypass intermediate routers that can be powered-on or powered-off. Furthermore, based on our extended router structure, a certain transmission ability of the powered-off routers is kept to transfer packets going through the normal paths. Thus, even though some packets do not take a virtual bypass path, they still have less probability to be blocked by the powered-off routers. Compared with a conventional NoC without power gating, our EVC-based power gating approach causes only 2.67% performance penalty, which is less than 28.67%, 7.24%, and 5.69% penalties in related approaches. With small hardware overhead, our approach reduces on average 68.29% of the total power consumption in a NoC, which is comparable with the 72.94%, 73.56%, and 75.3% reduction of the total power consumption in related approaches.","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121607088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

PoLibSi: Path Towards Intrinsically Reconfigurable Components PoLibSi:通向内在可重构组件的道路

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00055

J. Nevoral, Václav Simek, R. Ruzicka

{"title":"PoLibSi: Path Towards Intrinsically Reconfigurable Components","authors":"J. Nevoral, Václav Simek, R. Ruzicka","doi":"10.1109/DSD.2019.00055","DOIUrl":"https://doi.org/10.1109/DSD.2019.00055","url":null,"abstract":"One of the main research directions of polymorphic electronics is focused on various issues connected with the design of basic polymorphic components - polymorphic gates. Without a sufficient amount of polymorphic gates offering good properties, conventional electronics will be most likely the preferred way before polymorphic electronics in application scenarios targeting multifunctional behaviour or reconfiguration. The main objective of this paper is to propose a library called PoLibSi which contains eight sets of efficient bi-functional two-input polymorphic gates, whose function is selected by mutual polarity of dedicated power rails. The gate sets differ in the transistor type (conventional MOSFET, emerging double-gate ambipolar transistors), feature the gate sets were optimized to (transistor count, delay, power consumption) and input impedance constraint. The individual gates were designed by means of using an evolutionary based approach and further validated by HSPICE simulations. Each gate implementation includes a schematic, HSPICE description and simulation results. Moreover, propagation delay and power consumption is provided for all MOSFET based gates. Furthermore, each gate set is complete - it provides efficient implementation of any pair of two-input Boolean functions. Besides providing polymorphic gates with better properties to the research society, the aim of the proposed library is to improve the synthesis of polymorphic circuits in terms of the resulting size, as it is also shown in the paper. Finally, the PoLibSi library is available at: www.fit.vutbr.cz/~inevoral/polibsi","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121590652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Occupancy Grid Fusion of Low-Level Radar and Time-of-Flight Sensor Data 低空雷达与飞行时间传感器数据的占用网格融合

2019 22nd Euromicro Conference on Digital System Design (DSD) Pub Date : 2019-08-01 DOI: 10.1109/DSD.2019.00038

Josef Steinbaeck, C. Steger, E. Brenner, G. Holweg, N. Druml

{"title":"Occupancy Grid Fusion of Low-Level Radar and Time-of-Flight Sensor Data","authors":"Josef Steinbaeck, C. Steger, E. Brenner, G. Holweg, N. Druml","doi":"10.1109/DSD.2019.00038","DOIUrl":"https://doi.org/10.1109/DSD.2019.00038","url":null,"abstract":"We present an approach to fuse radar and time-of-flight (ToF) range sensor data into an occupancy grid. Fusing the low-level data at sensor level prevents the loss of precious information during compression and pre-processing. Constructing the low-level occupancy grid from raw sensor data enables the detection of occupied cells which are not clearly visible by any of the single sensors. Fusion of the heterogeneous sensor data enhances the perception quality since single sensors fail in certain conditions. Thus, the fusion at low-level holds a high potential to enhance the perception quality for automotive/robotic applications. We demonstrate our approach with real-world data from a mobile sensor platform with three ToF cameras and a 77 GHz high-resolution radar sensor. An occupancy grid is created whenever synchronized sensor data from all sensors is available. The proposed method performed successful detection of multiple pedestrians in different test scenarios. Our approach to build an occupancy grid from radar and optical range sensors can be used as a base in various short-range perception applications (e.g., in robotics or mobile devices).","PeriodicalId":217233,"journal":{"name":"2019 22nd Euromicro Conference on Digital System Design (DSD)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124017139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6