2022 25th Euromicro Conference on Digital System Design (DSD)最新文献_第3页

A Resilient System Design to Boot a RISC-V MPSoC 启动RISC-V MPSoC的弹性系统设计

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00039

Antti Nurmi, Antti Rautakoura, Henri Lunnikivi, Timo D. Hämäläinen

{"title":"A Resilient System Design to Boot a RISC-V MPSoC","authors":"Antti Nurmi, Antti Rautakoura, Henri Lunnikivi, Timo D. Hämäläinen","doi":"10.1109/DSD57027.2022.00039","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00039","url":null,"abstract":"This paper presents a highly resilient boot process design for Ballast, a new RISC- V based multiprocessor system-on-chip (SoC). An open source RISC- V SoC was adapted as a bootstrap processor and customized to meet our requirement for guaranteed chip wake-up. We outline the characteristic challenges of implementing a large program into a read-only memory (ROM) used for booting and propose generally applica-ble workflows to verify the boot process for application specific integrated circuit (ASIC) synthesis. We implemented four distinct boot modes. Two modes that load a software bootloader autonomously from an SD card are implemented for a secure digital input output (SDIO) interface and for a serial peripheral interface (SPI), respectively. Another SDIO based mode allows for direct program execution from external memory, while the last mode is based on usage of a RISC- V debug module. The boot process was verified with instruction set simulation, register transfer level simulation, gate-level simulation and field-programmable gate array prototyping. We received the fabricated ASIC samples and were able to successfully boot the chip via all boot modes on our custom circuit board.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131282496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

CELR: Cloud Enhanced Local Reconstruction from low-dose sparse Scanning Electron Microscopy images 低剂量稀疏扫描电镜图像的云增强局部重建

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00083

F. Putter, Maurice Peemen, P. Potocek, R. Schoenmakers, H. Corporaal

{"title":"CELR: Cloud Enhanced Local Reconstruction from low-dose sparse Scanning Electron Microscopy images","authors":"F. Putter, Maurice Peemen, P. Potocek, R. Schoenmakers, H. Corporaal","doi":"10.1109/DSD57027.2022.00083","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00083","url":null,"abstract":"Current Scanning Electron Microscopy (SEM) acquisition techniques are far too slow to capture large volumes in a feasible time. One solution is to use low-dose and sparse imaging. By computationally denoising and inpainting an image with acceptable quality can be approximated. This approach, however, requires significant compute resources. Therefore, this paper proposes CELR, a framework, that hides the computationally expensive workload of reconstructing low-dose sparse SEM images, such that (delayed) live reconstruction is possible. Live reconstruction is possible by using Convolutional Neural Networks (CNNs) that approximate a classical reconstruction algorithm like GOAL. The reconstruction by CNNs is done locally, while recurring training of CNNs is done in the cloud. Moreover, training labels are generated by GOAL in the cloud. Next to the framework, this paper evaluates and optimizes the CNN reconstruction throughput by employing Nvidia's TensorRT. This paper also touches upon open research questions about on-the-fly CNN training. The combination of CELR and TensorRT enables large volume acquisitions with a dwell-time of $mathbf{1}mu s$ and 10% pixel coverage to be reconstructed on a single GPU.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133683215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology SMART:研究阈值电压抑制在sram内倍增/累积加速器中对65nm CMOS技术精度提高的影响

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00115

Saeed Seyedfaraji, B. Mesgari, Semeen Rehman

{"title":"SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology","authors":"Saeed Seyedfaraji, B. Mesgari, Semeen Rehman","doi":"10.1109/DSD57027.2022.00115","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00115","url":null,"abstract":"State-of-the-art In-memory processing has recently emerged as the most promising solution to overcome design challenges related to data movement inside current computing systems. One of the approaches to performing In-memory processing is based on the analog behavior of the data stored inside the memory cell. Analog-based approaches proposed various system architectures for that. In this paper, we have investigated the effect of threshold voltage suppression on the access transistors of the In-SRAM multiplication and accumulation (MAC) accelerator to improve and enhance the performance of bit line (bit line bar) discharge rate that will increase the accuracy of MAC operation. We provide a comprehensive analytical analysis followed by circuit implementation, including a Monte-Carlo simulation by a 65nm CMOS technology. We confirmed the efficiency of our method (SMART) for a four-by-four-bit MAC operation. The proposed technique improves the accuracy while consuming 0.683 pJ per computation from a power supply of IV. Our novel technique presents less than 0.009 standard deviations for the worst-case incorrect output scenario.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115063697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A holistic hardware-software approach for fault-aware embedded systems 故障感知嵌入式系统的整体软硬件方法

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00099

F. Kempf, Christoph Kühbacher, C. Mellwig, S. Altmeyer, T. Ungerer, J. Becker

{"title":"A holistic hardware-software approach for fault-aware embedded systems","authors":"F. Kempf, Christoph Kühbacher, C. Mellwig, S. Altmeyer, T. Ungerer, J. Becker","doi":"10.1109/DSD57027.2022.00099","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00099","url":null,"abstract":"Fault detection and fault tolerance are a already crucial part of many embedded systems and will become even more important in the future. Reasons are the increasing complexity of software used in safety-critical environments and the trend to execute software components with varying criticality on the same hardware. We propose a novel approach for a flexible and adaptive fault handling. Our approach combines an adaptive hardware architecture with a flexible runtime environment to detect and handle faults. In this paper, we present the structure of a tile-based many-core architecture with runtime-adaptive lockstep cores and the design of a flexible dataflow software framework utilizing this hardware platform. We demonstrate that the hardware overhead for our adaptive lockstep concept and the hardware requirements of our runtime environment are minor and thus allow the use in embedded systems. Furthermore, we verified the fault detection and correction capabilities of both the hardware and software via a hardware fault injection mechanism. In addition, our runtime evaluation shows promising results for different redundancy concepts. For this purpose, we compare the execution time of software-only and hardware-only redundancy solutions as well as combinations of both with a non-redundant baseline for different benchmark applications.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115600016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Hardware Support for Predictable Resource Sharing in Virtualized Heterogeneous Multicores 虚拟化异构多核中可预测资源共享的硬件支持

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00034

T. Sandmann, Jürgen Becker

引用次数: 0

A Clustering-Based Scoring Mechanism for Malicious Model Detection in Federated Learning 联邦学习中基于聚类的恶意模型检测评分机制

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00038

Cem Caglayan, A. Yurdakul

引用次数: 0

ESAS: Exponent Series based Approximate Square Root Design 基于指数级数的近似平方根设计

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00015

Omkar G. Ratnaparkhi, M. Rao

{"title":"ESAS: Exponent Series based Approximate Square Root Design","authors":"Omkar G. Ratnaparkhi, M. Rao","doi":"10.1109/DSD57027.2022.00015","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00015","url":null,"abstract":"Approximate computing is an emerging method-ology that offers hardware benefits when compared with the traditional computing design at the cost of accuracy. It is highly suitable for applications which does not require precision but rather try to preserve exactness of the outcome. Many arithmetic designs have evolved over the years using approximate methodologies. Square-root is one of the common yet complex hardware unit which is often employed in image processing and communication system design application. However not much hardware implementation of square-root function is seen. In this paper a novel square-root design is proposed that offers better accuracy, and improved hardware results compared to that of the previous works. The proposed design utilizes first two terms of exponent series expansion and applies two level of approximation to evolve not only hardware efficient square-root designs but also offer improved error characteristics. The approximate Square-root design was implemented in all the three data-formats including integer, fixed, and IEEE half precision floating point. The proposed designs were validated on Sobel Edge Detection algorithm and envelope detector for communication design to provide accelerated performance.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"0 0 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126337897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Program Committee: DSD 2022 项目委员会:DSD 2022

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/dsd57027.2022.00007

引用次数: 0

Development of a Hyperspectral Colposcope for Early Detection and Assessment of Cervical Dysplasia 用于宫颈发育不良早期检测和评估的高光谱阴道镜的研制

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00121

Carlos Vega, Raquel León, Norberto Medina, H. Fabelo, S. Ortega, F. Balea, Aday García, Margarita Medina, Silvia De León, Alicia Martín, G. Callicó

{"title":"Development of a Hyperspectral Colposcope for Early Detection and Assessment of Cervical Dysplasia","authors":"Carlos Vega, Raquel León, Norberto Medina, H. Fabelo, S. Ortega, F. Balea, Aday García, Margarita Medina, Silvia De León, Alicia Martín, G. Callicó","doi":"10.1109/DSD57027.2022.00121","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00121","url":null,"abstract":"The early detection of precancerous cervical lesions is essential to improve patient treatment and prognosis. Current methods of screening and diagnosis have improved the detection of these lesions but still present some critical limitations. Hyperspectral (HS) imaging is emerging as a new non-invasive and label-free imaging technique in the medical field for performing quick diagnosis of different diseases. This work describes the first step in the research and development process to present to the gynaecologist a new non-invasive tool to detect cervical neoplasia during routine medical procedures. This tool is based on a HS camera coupled to a colposcope, a primary tool already used in cervical examinations. The developed HS colposcope was validated by comparing the HS images obtained against the captures obtained with conventional optics. Results show the feasibility of the developed system to start a data acquisition campaign of cervical lesions targeting future developments of algorithms based on artificial intelligence.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126770594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Skeptical Dynamic Dependability Management for Automated Systems 自动化系统的怀疑动态可靠性管理

2022 25th Euromicro Conference on Digital System Design (DSD) Pub Date : 2022-08-01 DOI: 10.1109/DSD57027.2022.00025

F. Arnez, Guillaume Ollier, A. Radermacher, Morayo Adedjouma, Simos Gerasimou, C. Mraidha, F. Terrier

{"title":"Skeptical Dynamic Dependability Management for Automated Systems","authors":"F. Arnez, Guillaume Ollier, A. Radermacher, Morayo Adedjouma, Simos Gerasimou, C. Mraidha, F. Terrier","doi":"10.1109/DSD57027.2022.00025","DOIUrl":"https://doi.org/10.1109/DSD57027.2022.00025","url":null,"abstract":"Dynamic Dependability Management (DDM) is a promising approach to guarantee and monitor the ability of safety-critical Automated Systems (ASs) to deliver the intended service with an acceptable risk level. However, the non-interpretability and lack of specifications of the Learning-Enabled Components (LECs) used in ASs make this mission particularly challenging. Some existing DDM techniques overcome these limitations by using probabilistic environmental perception knowledge associated with predicting behavior changes for the agents in the environment. We propose to improve these techniques with a supervisory system that considers hazard analysis and risk assessment from the design stage. This hazard analysis is based on a characterization of the AS's operational domain (i.e., its scenario space, including unsafe ones). The proposed supervisory system also considers the uncertainty estimation and interaction between AS components through the whole perception-planning-control pipeline. Our framework then proposes leveraging and handling uncertainty from LEC components toward building safer ASs.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126884536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1