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Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium最新文献

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Stress analysis and reliability of chip on board encapsulation technology 片上封装技术的应力分析与可靠性
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398219
P. Sarbach, L. Guerin, A. Weber, M. Dutoit, P. Clot
{"title":"Stress analysis and reliability of chip on board encapsulation technology","authors":"P. Sarbach, L. Guerin, A. Weber, M. Dutoit, P. Clot","doi":"10.1109/IEMT.1993.398219","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398219","url":null,"abstract":"It is shown that polymerization and thermomechanical stresses are important in miniaturized chip on board (COB) modules. COB technology is reliable enough to meet most of the demands from the market if the manufacturer has the process perfectly under control. There are two methods to check finite element method and ensure reliability of such miniaturized structures: (FEM) simulation and measurements with test die. FEM allows predictive calculations of stress which are verified by experiment. The FEM allows easy optimization during the design phase and provides a powerful tool to ensure the quality and reliability of low cost COB multichip modules.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115543599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Mechanized assembly of multichip modules 多芯片模块的机械化组装
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398193
D. D. Evans, R. H. Hoffman, B.W. Hueners
{"title":"Mechanized assembly of multichip modules","authors":"D. D. Evans, R. H. Hoffman, B.W. Hueners","doi":"10.1109/IEMT.1993.398193","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398193","url":null,"abstract":"Competitive matrices are valuable to illustrate where each product stands in relation to satisfying an end-user's requirements. Categories in a competitive matrix may include: (1) customer support - the cost of downtime is high and processes are increasingly more complex; (2) uptime related issues including mean-time-to-repair, mean-time-to-failure, parts availability and service skills; (3) performance - the ability to perform the required function, and (4) upgrade ability - the ongoing utility of the equipment as production requirements change.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"93 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128024707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A work cell manufacturing system for VLSI fabrication 一种用于超大规模集成电路制造的工作单元制造系统
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398202
Ruey-Shan Guo, Mike, Ralph, Ken Holman, Fairchild Reseaxch
{"title":"A work cell manufacturing system for VLSI fabrication","authors":"Ruey-Shan Guo, Mike, Ralph, Ken Holman, Fairchild Reseaxch","doi":"10.1109/IEMT.1993.398202","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398202","url":null,"abstract":"The concepts behind the next-generation work cell semiconductor manufacturing system capable of achieving competitive advantages in product quality, variety, cost, and time to market are presented. The new system with modular work cells is targeted at high product variety and lean production. This contrasts with the traditional job shop system targeted at low product variety and mass production. In the new work cell system, each cell consists of different types of machines performing multiple and consecutive functions. It increases flexibility by decomposing operations into parallel lines, and streamlines the production flow by moving wafers in small lot sizes with minimum buffers. Other issues such as operational flow control, equipment selections, and people-centered improvement in the new system are addressed.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126344671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Solder bump fabrication by electroplating for flip-chip applications 用于倒装芯片的电镀凸点焊料制造
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398191
K. Yu, F. Tung
{"title":"Solder bump fabrication by electroplating for flip-chip applications","authors":"K. Yu, F. Tung","doi":"10.1109/IEMT.1993.398191","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398191","url":null,"abstract":"A step-by-step description of a solder alloy bumping process for flip-chip application is discussed. Emphasis is placed on a 75-/spl mu/m high bump, as plated, with a pitch of 125-/spl mu/m array pattern is successfully achieved using conventional positive photoresist masking. The under-bump metallurgy (UBM) is sputtered Ti/Cu. The Sn/Pb composition of solder alloy such as 60/40 or 5/95 and the etchants used on the exposed UBM are discussed. This process is compatible with other IC wafer processes. The solder bump reflow is achieved utilizing a rosin flux and hot plate which is closely controlled in temperature and environment.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115107301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A partitioning advisor for studying the tradeoff between peripheral and area array bonding of components in multichip modules 用于研究多芯片模块中外设和区域阵列键合之间权衡的分区顾问
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398192
P. Sandborn, M. Abadir, C. Murphy
{"title":"A partitioning advisor for studying the tradeoff between peripheral and area array bonding of components in multichip modules","authors":"P. Sandborn, M. Abadir, C. Murphy","doi":"10.1109/IEMT.1993.398192","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398192","url":null,"abstract":"The tradeoff between peripheral I/O format die (for wire bonding, tape automated bonding, or peripheral flip chip bonding) and area array I/O format die (for flip chip bonding) is examined as a function of partitioning a fixed functionality into a variable number of die. The comparison is made in the context of a multichip module (MCM). The automated analysis approach concurrently considers module size, thermal and electrical performance, and cost (including module level test and network) to assess the overall applicability of one bonding format over the other.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114916410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
In-line, real-time nondestructive monitoring of Fe contamination for statistical process control (SPC) by surface photovoltage (SPV) 利用表面光电压(SPV)在线、实时、无损监测统计过程控制(SPC)中的铁污染
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1993-10-04 DOI: 10.1109/IEMT.1993.398231
J. Lowell, V. Wenner, J. Thomas, L. Jastrzebski, J. Lagowski, W. Henley, D. DeBusk, P. Edelman, C. Nauka
{"title":"In-line, real-time nondestructive monitoring of Fe contamination for statistical process control (SPC) by surface photovoltage (SPV)","authors":"J. Lowell, V. Wenner, J. Thomas, L. Jastrzebski, J. Lagowski, W. Henley, D. DeBusk, P. Edelman, C. Nauka","doi":"10.1109/IEMT.1993.398231","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398231","url":null,"abstract":"During high temperature operations, heavy metals will precipitate and form localized silicides at the silicon/oxide interface, which introduces weak spots that cause gate dielectric integrity and reliability problems. To address this issue real-time monitors of metallic concentration can be used to control contamination to an acceptable level. The technique of surface photovoltage (SPV) is a passive diagnostic which has been implemented into semiconductor manufacturing for this specific purpose. The application of SPV to actual cases in fabrication using SPC is discussed. This emphasizes the need to increase production control of overall metallic contamination for future CMOS technologies which is illustrated.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114939692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Solder replacement 焊料替换
Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium Pub Date : 1900-01-01 DOI: 10.1109/IEMT.1993.398211
H. Hvims
{"title":"Solder replacement","authors":"H. Hvims","doi":"10.1109/IEMT.1993.398211","DOIUrl":"https://doi.org/10.1109/IEMT.1993.398211","url":null,"abstract":"The use of conductive adhesives as a replacement for solder on surface mount technology (SMT) printed circuit boards is discussed. A number of conductive adhesives has been selected. One of the two key issues is to uncover the market for adhesive types and their composition. The other is the technical investigation of the influence of component termination and printed circuit surface types on adhesive bonding stability. Four different types of adhesives on two different metal surfaces are compared with conventional solder technology. All adhesive variants are microsectioned for metallurgical and microstructure examination. Energy dispersive analysis of X-ray (EDAX) of the metal particles in the adhesive is carried out and documented. Rework of conductive joints is briefly reported. Aspects of occupational health are discussed concerning work with adhesive types. Work with epoxy based adhesives is discussed.<<ETX>>","PeriodicalId":206206,"journal":{"name":"Proceedings of 15th IEEE/CHMT International Electronic Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129172385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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