Solder bump fabrication by electroplating for flip-chip applications

Abstract

A step-by-step description of a solder alloy bumping process for flip-chip application is discussed. Emphasis is placed on a 75-/spl mu/m high bump, as plated, with a pitch of 125-/spl mu/m array pattern is successfully achieved using conventional positive photoresist masking. The under-bump metallurgy (UBM) is sputtered Ti/Cu. The Sn/Pb composition of solder alloy such as 60/40 or 5/95 and the etchants used on the exposed UBM are discussed. This process is compatible with other IC wafer processes. The solder bump reflow is achieved utilizing a rosin flux and hot plate which is closely controlled in temperature and environment.<>