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Advances in Computer Graphics Hardware最新文献

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Developments in High Performance CGI Systems 高性能CGI系统的发展
Advances in Computer Graphics Hardware Pub Date : 1987-10-01 DOI: 10.2312/EGGH/EGGH86/059-070
R. L. Grimsdale, P. Lister
{"title":"Developments in High Performance CGI Systems","authors":"R. L. Grimsdale, P. Lister","doi":"10.2312/EGGH/EGGH86/059-070","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH86/059-070","url":null,"abstract":"This contribution describes some work being undertaken in the design andimplementation of architectures for high performance Computer Image Generationfor a range of applications from workstations to flight simulator visual systems. \u0000 \u0000The work to be described uses a model based on a polygon representation anduses a Geometry Processor sub-system, with a flexible architecture known as MAGIC. This system performs the transformation of the polygon from the 3-Drepresentation to the 2-D perspective projection to the viewing screenco-ordinates and also provides a clipping operation optional in 3-D or 2-D. Two different types of scan conversion system are described, the first the Zone Management Processor uses the coherence inherent in the polygon and thesecond system based on a Line Processor uses coherence with spans.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1987-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124098531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
VLSI Chip for Ray Tracing Bicubic Patches 用于光线追踪双立方贴片的VLSI芯片
Advances in Computer Graphics Hardware Pub Date : 1987-10-01 DOI: 10.2312/EGGH/EGGH86/125-140
R. Pulleyblank, J. Kapenga
{"title":"VLSI Chip for Ray Tracing Bicubic Patches","authors":"R. Pulleyblank, J. Kapenga","doi":"10.2312/EGGH/EGGH86/125-140","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH86/125-140","url":null,"abstract":"A VLSI chip for ray tracing bicubic patches in Bezier form is explored. The purpose of the chip is to calculate the intersection point of a ray with the bicubic patch to a specified level of accuracy, returning the location of the intersection on the patch and on the ray. This is done by computing the intersection of the ray with a bounding volume of the patch and repeatedly subdividing the patch until the bounding volume of subpatches hit by the ray is smaller than the accuracy requirement. There are two operating modes, one in which only the nearest intersection is found and another in which all intersections are found. This algorithm correctly handles rays tangentially intersecting a planar patch and ray intersections at a silhouette edge of the patch. Estimates indicate that such a chip could be implemented in 2 micron NMOS and could compute patch/ray intersections at the rate of one every 15 microseconds for patches that are prescaled and specified to 12 bits fixed point for each of the x, y and z components. A version capable of handling 24 bit patches could compute patch/ray intersections at the rate of one every 140 microseconds. Images drawn using a software version of the algorithm are presented and discussed.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1987-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121497274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Towards a Z-Buffer and Ray-Tracing Multimode System based on Parallel Architecture and VLSI chips 基于并行结构和VLSI芯片的z -缓冲和光线追踪多模系统
Advances in Computer Graphics Hardware Pub Date : 1987-10-01 DOI: 10.2312/EGGH/EGGH86/141-145
P. Leray
{"title":"Towards a Z-Buffer and Ray-Tracing Multimode System based on Parallel Architecture and VLSI chips","authors":"P. Leray","doi":"10.2312/EGGH/EGGH86/141-145","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH86/141-145","url":null,"abstract":"After the hidden surfaces algorithms for 3D rastergraphics, hardware design isthe main problem, for many applicat ions, such as : Audiovisual animat ions. CADCAM,and simulation. \u0000 \u0000After a short description of our CUBI 7 system (a 3D real-time Z-buffer system), and its CRISTAL module which increases RAY-TRACING computations, we present ourhardware project based on : \u0000 \u0000- Parallel architecture for RAY-TRACING, special effects ; This module is alsouseful for pre-processing the image : (rotations, clipping, perspective transform... ). \u0000 \u0000- A or Z-BUFFER which will be designed on VLSI chips polygon filling will be alsodesigned with pipe-lined chips.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1987-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126382496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Display Hardware for Boolean Expression Models 布尔表达式模型的显示硬件
Advances in Computer Graphics Hardware Pub Date : 1986-08-01 DOI: 10.2312/EGGH/EGGH86/094-121
A. L. Thomas
{"title":"Display Hardware for Boolean Expression Models","authors":"A. L. Thomas","doi":"10.2312/EGGH/EGGH86/094-121","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH86/094-121","url":null,"abstract":"In any discussion of graphics hardware there appear to be two basic positions which can be adopted. The first is that of the technologist, who is primarily concerned with what it is possible to make and how to make it. The second is that of the system designer who is more interested in what it would be desirable to make. To be a designer it is necessary to have a view of the future ... or at least a view of a plausible future! This is only possible with a reasonably sound idea of what the technologists might be persuaded to provide. I suspect that most of the \"images of the future\" which have guided or moulded current proposals have been around for some time. In spite of this it is a good preliminary exercise to set out a brief statement of the main ideas Which lie behind current developments, before homing in on specific hardware proposals.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1986-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128537686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallel Subpixel Scanconversion 并行亚像素扫描转换
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH87/155-166
U. Claussen
{"title":"Parallel Subpixel Scanconversion","authors":"U. Claussen","doi":"10.2312/EGGH/EGGH87/155-166","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH87/155-166","url":null,"abstract":"Computer graphics and its subsections image processing, image analysis and image generation are known to be a wide field for the application of parallel architectures. While in image processing and analysis the demand for \"real time\" computation is in the center of discussion, it becomes more and more important in the field of image generation, too. Some applications, like sequences of realistic appearing images raise highest demands on algorithm and architecture as well.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127352925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Presentation of the Cubi9000: A Graphics System based on Inmos T800 Transputers 基于Inmos T800处理器的Cubi9000图形系统的介绍
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH89/179-198
France Glémot
{"title":"Presentation of the Cubi9000: A Graphics System based on Inmos T800 Transputers","authors":"France Glémot","doi":"10.2312/EGGH/EGGH89/179-198","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH89/179-198","url":null,"abstract":"","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116388716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parallel Processing on a Transputer-based Graphics Board 基于转发器的图形板并行处理
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH88/201-212
J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes
{"title":"Parallel Processing on a Transputer-based Graphics Board","authors":"J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes","doi":"10.2312/EGGH/EGGH88/201-212","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH88/201-212","url":null,"abstract":"This paper discusses the design of a graphics board with parallel architecture based on Transputers and a resolution of 1024 × 1024 × 8 [VIN88], namely: Ihe processing unit (it plays the role of a display processor), the organization of the frame buffer and the video output hardware which includes the video controller and a RAMDAC (lookup-table + DACs).","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"298 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113998668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The Flipping Cube: A Device for Rotating 3D Rasters 翻转立方体:用于旋转3D光栅的设备
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH91/086-099
R. Yagel
{"title":"The Flipping Cube: A Device for Rotating 3D Rasters","authors":"R. Yagel","doi":"10.2312/EGGH/EGGH91/086-099","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH91/086-099","url":null,"abstract":"Driven by the prospect of three-dimensional rasters as a primary vehicle for future 3D graphics and volumetric imaging, this paper introduces an architecture for real-time rendering of high-resolution volumetric images. The Flipping Cube Architecture utilizes parallel memory organization and a unique data orientation scheme in order to support contention free access to viewing rays.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132083724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Hardware Outline Character Rasterization 硬件轮廓字符栅格化
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH91/103-115
Marc Morgan, R. Hersch
{"title":"Hardware Outline Character Rasterization","authors":"Marc Morgan, R. Hersch","doi":"10.2312/EGGH/EGGH91/103-115","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH91/103-115","url":null,"abstract":"This paper presents the design and implementation of an application specific integrated circuit (ASIC) for real-time rasterization of characters described by their outline based on vertical scan-conversion and flag full algorithms. The chip acts as a coprocessor which rasterizes outline fonts given by Bezier splines and straight line segments. It generates high quality fonts at a rate 30 times higher than the equivalent assembly language code on a 16 MHz M68020.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116493505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Dedicated Graphics Processor SIGHT-2 专用图形处理器SIGHT-2
Advances in Computer Graphics Hardware Pub Date : 1900-01-01 DOI: 10.2312/EGGH/EGGH89/151-169
Masaharu Yoshida, T. Naruse, Tokiichiro Takahashi
{"title":"A Dedicated Graphics Processor SIGHT-2","authors":"Masaharu Yoshida, T. Naruse, Tokiichiro Takahashi","doi":"10.2312/EGGH/EGGH89/151-169","DOIUrl":"https://doi.org/10.2312/EGGH/EGGH89/151-169","url":null,"abstract":"SIGHT-2 is a multiprocessor system that is intended to efficiently execute the ray tracing algorithm. To achieve high efficiency, three kinds of parallel execution mechanisms; (i) a multiprocessor configuration, (ii) a parallel execution of three dimensional vector operations, and (iii) functionally distributed parallel processing are introduced. Owing to the latter two techniques, each processing element (PE) has the ability to execute the standard ray tracing algorithm 10 times faster than a VAX11/780 with a floating point accelerator. In the present configuration, SIGHT-2 utilizes 16 PEs, which results in a peak power of 66.72 MFLOPS / 133.28 MIPS. During ray tracing, the efficiency of each PE is over 99% under static load balancing. \u0000 \u0000In this paper, SIGHT-2 system architecture, its PE configuration, and VLSIs design are discussed. The system performance is also discussed.","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125908769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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