J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes
{"title":"基于转发器的图形板并行处理","authors":"J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes","doi":"10.2312/EGGH/EGGH88/201-212","DOIUrl":null,"url":null,"abstract":"This paper discusses the design of a graphics board with parallel architecture based on Transputers and a resolution of 1024 × 1024 × 8 [VIN88], namely: Ihe processing unit (it plays the role of a display processor), the organization of the frame buffer and the video output hardware which includes the video controller and a RAMDAC (lookup-table + DACs).","PeriodicalId":206166,"journal":{"name":"Advances in Computer Graphics Hardware","volume":"298 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Parallel Processing on a Transputer-based Graphics Board\",\"authors\":\"J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes\",\"doi\":\"10.2312/EGGH/EGGH88/201-212\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses the design of a graphics board with parallel architecture based on Transputers and a resolution of 1024 × 1024 × 8 [VIN88], namely: Ihe processing unit (it plays the role of a display processor), the organization of the frame buffer and the video output hardware which includes the video controller and a RAMDAC (lookup-table + DACs).\",\"PeriodicalId\":206166,\"journal\":{\"name\":\"Advances in Computer Graphics Hardware\",\"volume\":\"298 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Advances in Computer Graphics Hardware\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.2312/EGGH/EGGH88/201-212\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Advances in Computer Graphics Hardware","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.2312/EGGH/EGGH88/201-212","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Parallel Processing on a Transputer-based Graphics Board
This paper discusses the design of a graphics board with parallel architecture based on Transputers and a resolution of 1024 × 1024 × 8 [VIN88], namely: Ihe processing unit (it plays the role of a display processor), the organization of the frame buffer and the video output hardware which includes the video controller and a RAMDAC (lookup-table + DACs).