Parallel Processing on a Transputer-based Graphics Board

J. Pereira, Francisco Reis, Carlos Vinagre, M. Gomes
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Abstract

This paper discusses the design of a graphics board with parallel architecture based on Transputers and a resolution of 1024 × 1024 × 8 [VIN88], namely: Ihe processing unit (it plays the role of a display processor), the organization of the frame buffer and the video output hardware which includes the video controller and a RAMDAC (lookup-table + DACs).
基于转发器的图形板并行处理
本文讨论了一种基于Transputers、分辨率为1024 × 1024 × 8 [VIN88]的并行架构显卡的设计,即:处理单元(起显示处理器的作用)、帧缓冲区的组织和视频输出硬件(包括视频控制器和RAMDAC)的设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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