{"title":"Image quality impact for eye tracking systems accuracy","authors":"Pavel Morozkin, M. Swynghedauw, M. Trocan","doi":"10.1109/ICECS.2016.7841226","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841226","url":null,"abstract":"The accuracy of the eye tracking systems is a key indicator of data validity. Currently developed eye tracking systems can be configured to be used as remote wireless autonomous systems. In order to meet the required constraints of system's responsiveness and effectively use the available hardware, image compression techniques can be employed in order to reduce the amount of data needed to be sent via a physical transmission link. Since eye tracking systems are sensitive to input image details it is necessary to preserve as much details as possible. In this paper we are presenting results of accuracy gradation for an eye tracking system depending on the quality of the decompressed image. This image is used as input for the eye tracking system in order to find the minimal acceptable quality that leads to neglectable tracking systematic errors.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115743497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Accessing on-chip temperature health monitors using the IEEE 1687 standard","authors":"Ghazanfar Ali, A. Badawy, H. Kerkhoff","doi":"10.1109/ICECS.2016.7841317","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841317","url":null,"abstract":"The IEEE 1687 (IJTAG) is a newly IEEE approved standard to access embedded instruments. The usage of these embedded instruments (health monitors) is increasing in order to perform different online measurements for testing purposes as dependability is becoming a key concern in today's electronics. Aging and intermittent resistive faults (IRF) are two threats to a highly dependable system, and temperature can accelerate these two phenomena. In this paper, the work carried out for enabling online IJTAG control, observation and reconfiguration of the health monitors will be discussed. Three temperature monitors along with an IJTAG controller are used to demonstrate online temperature measurements using an IJTAG network interface. The simulation results show that the proposed (on-chip) methodology can reduce the dependency on the PC while observing the (static) embedded instruments in the field.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116249788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Sanchez, Mário Saldanha, M. Porto, B. Zatt, L. Agostini, C. Marcon
{"title":"Real-time simplified edge detector architecture for 3D-HEVC depth maps coding","authors":"G. Sanchez, Mário Saldanha, M. Porto, B. Zatt, L. Agostini, C. Marcon","doi":"10.1109/ICECS.2016.7841205","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841205","url":null,"abstract":"This paper introduces the Simplified Edge Detector (SED) architecture for 3D-HEVC depth maps coding. The SED algorithm classifies the encoding block as homogeneous or edge. When SED classifies the encoding block as homogeneous, the encoding is simplified skipping the bipartition modes evaluation. This approach is capable of reducing 96.7% the bipartition modes evaluation with a drawback of only 0.94% in BD-rate. The SED hardware is capable of providing the decision for all available blocks inside a 32×32 block in only 34 cycles, with a power dissipation of only 25 μW per frame, when synthesized for 65 nm ST standard cells technology.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114811447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Remote RF powering of ambient sensors","authors":"J. Nicot, T. Taris","doi":"10.1109/ICECS.2016.7841313","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841313","url":null,"abstract":"The large scale deployment of Wireless Sensor Networks faces the major challenge of the sensor nodes being energetically self-sustained in order to operate them over several years. Energy harvesting, as well as remote powering are considered as viable solutions to address some scenarios of autonomous sensing. This work investigates the development of a battery-less ambient sensor exploiting remote RF powering in the 900MHz ISM Band.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126942187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Oliveira, Matheus T. Moreira, R. Guazzelli, Ney Laert Vilar Calazans
{"title":"ASCEnD-FreePDK45: An open source standard cell library for asynchronous design","authors":"C. Oliveira, Matheus T. Moreira, R. Guazzelli, Ney Laert Vilar Calazans","doi":"10.1109/ICECS.2016.7841286","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841286","url":null,"abstract":"An analysis of the state of art in asynchronous circuits reveals a lack of resources to support their design. When asynchronous cell libraries appear in the literature, they often accompany a demand from specific circuit designs, and are not proposed as general purpose resources to support semi-custom design styles. Moreover, currently proposed asynchronous libraries employ commercial technologies that cannot be distributed as open access. This work proposes and describes ASCEnD-FreePDK45, an open source standard cell library to support the design of asynchronous circuits. This first release of the library contains 30 different cells and is based on the FreePDK45 design kit, a predictive 45nm technology. Currently, the ASCEnD-FreePDK45 library supports both NCL and SDDS-NCL asynchronous design templates and is fully compatible with the NanGate FreePDK45 open cell library. ASCEnD-FreePDK45 relies on the ASCEnD-A design flow for its construction, which provides tools for transistor sizing, layout generation and electrical characterization. This article illustrates the use of the library with a semi-custom implementation of a 32-bit KoggeStone adder with cells from both the ASCEnD-FreePDK45 and the NanGate FreePDK45 libraries.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127191130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Netto, C. Guth, Vinicius S. Livramento, M. Castro, L. Pilla, José Luís Almada Güntzel
{"title":"Exploiting parallelism to speed up circuit legalization","authors":"R. Netto, C. Guth, Vinicius S. Livramento, M. Castro, L. Pilla, José Luís Almada Güntzel","doi":"10.1109/ICECS.2016.7841279","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841279","url":null,"abstract":"During physical synthesis, global placement produces a solution where cells are overlapped or misaligned with respect to circuit sites and rows. Therefore, a legalization step relocates a subset of cells in order to satisfy a set of legality constraints. Although several techniques have been proposed to solve the legalization problem, they were designed without considering parallelization. This work investigates the speedup that can be achieved by parallelizing full circuit legalization. For such evaluation we implemented a parallel version of the Abacus algorithm. Experimental results show that the proposed implementation achieves up to 2.43 times speedup with the same solution quality.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126593917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Camilo Coelho, Yann Delomier, D. Dallet, N. Deltimple, E. Kerhervé
{"title":"Implementation and simulation of the impact of mixer phase mismatch in cartesian feedback linearization systems","authors":"Camilo Coelho, Yann Delomier, D. Dallet, N. Deltimple, E. Kerhervé","doi":"10.1109/ICECS.2016.7841247","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841247","url":null,"abstract":"The Power Amplifier (PA) is a Radio Frequency (RF) circuit and its main goal is to drive the transmitter's (Tx) antenna. It faces a trade-off between spectral efficiency and power saving. Therefore, different linearization methods are proposed to increase linearity while optimizing power consumption. Digital Cartesian Feedback (CFB) presents itself as a good linearization system when using narrowband signals in portable or mobile devices. The main drawback with this implementation are the nonlinearities present on the feedback path. This work's main contribution is the analysis, simulation and correction of phase mismatch between forward and feedback paths. Firstly, implementation showed the impact of phase mismatch through spectrum side lobe increase. Next, phase mismatch is introduced in simulation along with a Phase Correction (P.C.) block. Finally, results show comparison between phase mismatch and performance degradation. The performance is measured through spectrum side lobes, RMS EVM and constellation plot. The results outlines not only the advantage of using CFB linearization in systems that presents phase mismatch, but also, how the P.C. can improve frequency response and EVM even further.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121725789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Amirsoleimani, M. Ahmadi, A. Ahmadi, M. Boukadoum
{"title":"Brain-inspired pattern classification with memristive neural network using the Hodgkin-Huxley neuron","authors":"A. Amirsoleimani, M. Ahmadi, A. Ahmadi, M. Boukadoum","doi":"10.1109/ICECS.2016.7841137","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841137","url":null,"abstract":"Recent findings about using memristor devices to mimic biological synapses in neuromorphic systems open a new vision in neuroscience. Ultra-dense learning architectures can be implemented through the Spike-Timing-Dependent-Plasticity (STDP) mechanism by exploiting these nanoscale nonvolatile devices. In this paper, a Spiking Neural Network (SNN) that uses biologically plausible mechanisms is implemented. The proposed SNN relies on Hodgkin-Huxley neurons and memristor-based synapses to implement a bio-inspired neuromorphic platform. The behavior of the proposed SNN and its learning mechanism are discussed, and test results are provided to show the effectiveness of the proposed design for pattern classification applications.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131842247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Lívia Amaral, Guilherme Povala, M. Porto, D. Silveira, S. Bampi
{"title":"Memory energy consumption analyzer for video encoder hardware architectures","authors":"Lívia Amaral, Guilherme Povala, M. Porto, D. Silveira, S. Bampi","doi":"10.1109/ICECS.2016.7841203","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841203","url":null,"abstract":"The motion estimation stage requires high number of memory accesses, causing high-energy consumption in the video coding process. This results in lower battery lifetime on mobile devices. Thus, solutions to reduce the external memory bandwidth in video coding systems must be used. This work proposes a memory energy consumption analyzer, which estimates the energy consumption related to memory accesses of video encoder systems. This analyzer enables the evaluation of different schemes with data reuse, reference frame compression and memory hierarchy, which are the most used techniques for memory bandwidth reduction and its associated energy consumption. This analyzer is implemented in SystemC, which allows system modeling in a simple and fast way. As a case study of the tool, the developed analyzer was used to evaluate a solution joining a reference frame compressor and a Level C data reuse scheme. The energy consumption results of the evaluated scheme present reduction on both write and read memory operations, reaching a total memory energy consumption reduction of 97.91% when compared to original video encoder without any technique for memory access reduction.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130480936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. Alimenti, C. Mariotti, M. Silvestri, V. Palazzi, M. Virili, P. Mezzanotte, L. Roselli
{"title":"Demonstration of 2.4 GHz vector modulator for RF wireless systems on cellulose-based substrates","authors":"F. Alimenti, C. Mariotti, M. Silvestri, V. Palazzi, M. Virili, P. Mezzanotte, L. Roselli","doi":"10.1109/ICECS.2016.7841117","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841117","url":null,"abstract":"This paper presents a 2.4 GHz vector modulator fabricated on mechanically flexible, low-cost, environmentally friendly, celluose-based substrate. This circuit can be adopted either as a digitally controlled target for radars' testing, or, more in general, as an I/Q modulator in RF systems. The system is composed by a directional coupler, two mixers and a Wilkinson divider, all of them designed in microstrip technology and resulting in a (64 × 119) mm2 planar device. The modulator functionality is demonstrated by showing the results of a wired test in which the modulator is connected to a signal generator (input), to a spectrum analyzer (output) and digitally controlled by means of an Arduino board.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121123632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}