2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)最新文献_第10页

Multi-band dual-mode antenna tunable matching network for broadband applications 宽带应用的多波段双模天线可调谐匹配网络

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841246

F. Po, Rahma Abdaoui, A. Giry

引用次数: 0

Delta-sigma based digital transmitters with low-complexity embedded-FIR digital to RF mixing 基于Delta-sigma的数字发射机，具有低复杂度嵌入式fir数字与RF混合

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841176

Răzvan-Cristian Marin, A. Frappé, A. Kaiser

引用次数: 3

A multi-modulus divider with high sensitivity and extended division range in 0.18 μm BiCMOS 一种在0.18 μm BiCMOS中具有高灵敏度和扩展分割范围的多模分频器

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841170

M. Kreissig, M. El-Shennawy, F. Ellinger

引用次数: 2

A fully integrated switch capacitor step down DC-DC converter in 65nm bulk CMOS technology with peak efficiency tracking 完全集成的开关电容降压DC-DC转换器，采用65nm体CMOS技术，具有峰值效率跟踪

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841164

C. Veri, M. Pasca, Giuseppe Tau, S. D’Amico

引用次数: 1

Auxiliary power supply for solid state transformers 固态变压器用辅助电源

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841165

L. B. Kehler, A. M. Kaminski, J. R. Pinheiro, C. Rech, T. Marchesan, Rene R. Emmel

引用次数: 10

A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing 用于高分辨率音频处理的低功耗非精确基数4乘法器

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841182

Guilherme Paim, L. Soares, Julio F. R. Oliveira, E. Costa, S. Bampi

{"title":"A power-efficient imprecise radix-4 multiplier applied to high resolution audio processing","authors":"Guilherme Paim, L. Soares, Julio F. R. Oliveira, E. Costa, S. Bampi","doi":"10.1109/ICECS.2016.7841182","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841182","url":null,"abstract":"This paper presents an power-efficient imprecise radix-4 multiplier applied to filtering Hi-Res (High Resolution) audio. The proposed multiplier was based on an imprecise 2×2 (m=2) multiplication block in order to implement optimized 2's complement radix-2m array multipliers. The imprecise 2×2 multiplication block was previously proposed in literature, and presents as main characteristic a tunable error that enables the building of an imprecise radix-4 multiplier with a reduced number of logic gates. Since in the radix-2m multiplier architecture the operands are split into groups of m bits, then, the m=2 imprecise multiplier is used as a basic component in its structure. Our work deals with different levels of approximation in the radix-2m multiplier. We present four different approximate radix-4 multipliers architectures to be used in sequential FIR filters implemented in hardware. The filters are described in VHDL and synthesized for ASIC in Cadence RTL Compiler tool using Nangate 45nm standard cells. The power reports are evaluated using real input vectors from Hi-Res audio sequences in order to obtain valid power dissipation results. The imprecise FIR filters present area and power reductions of up to 5.7% and 12.5% when compared to the precise designs without compromising the Signal to Noise Ratio (SNR) of recorded 24-bit@192kHz Hi-Res audio signals.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123929262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Always-on motion detection with application-level error control on a near-threshold approximate computing platform 基于近阈值近似计算平台的具有应用级误差控制的始终在线运动检测

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841261

Giuseppe Tagliavini, A. Marongiu, D. Rossi, L. Benini

{"title":"Always-on motion detection with application-level error control on a near-threshold approximate computing platform","authors":"Giuseppe Tagliavini, A. Marongiu, D. Rossi, L. Benini","doi":"10.1109/ICECS.2016.7841261","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841261","url":null,"abstract":"Pushing supply voltages in the near-threshold region is today one of the main avenues to minimize power consumption in digital integrated circuits. This works well with logic units, but memory operations on standard six-transistor static RAM (6T-SRAM) cells become unreliable at low voltages. Standard cell memory (SCM) works fully reliably at near-threshold voltages, but has much lower area density than 6T-SRAM and thus it is too costly. Hybrid memory designs based on a combination of 6T-SRAM and SCM have the potential to combine the best from both worlds, provided that appropriate software techniques for their management are used. Several embedded applications exhibit inherent tolerance to data approximation: this feature can be exploited by mapping error-tolerant data onto unreliable 6T-SRAM while keeping critical information error-free in SCM. However, one key issue is bounding error when it is input-data dependent. In this work we consider the motion detection stage of a computer vision pipeline, which is a major power bottleneck in always-on computer vision systems. We introduce an application-level metric for defining suitable tolerance thresholds and an associated runtime mechanism for their control. At each accuracy checkpoint the error on the computation is checked. If the runtime detects that an error threshold has been exceeded, the voltage settings are adjusted. Using this methodology, we achieve a significant reduction of the total energy consumption (up to 33% in the best case) while maintaining a tight control on quality of results.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114177551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA 基于FPGA的安全轻量级加密分组密码的故障诊断方案

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841315

Anita Aghaie, Mehran Mozaffari Kermani, R. Azarderakhsh

{"title":"Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA","authors":"Anita Aghaie, Mehran Mozaffari Kermani, R. Azarderakhsh","doi":"10.1109/ICECS.2016.7841315","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841315","url":null,"abstract":"The security and reliability of cryptosystems are endangered with natural occurring and malicious injected faults by leakage of the information. Efficient trade off among minimum performance and implementation metrics and high level of security for cryptosystems in constrained applications has led to proposed error detection schemes for lightweight block ciphers. These ciphers provide low-cost confidentiality in terms of low hardware complexity and fast implementation. In this paper, we propose fault diagnosis schemes for an efficient lightweight block cipher, RECTANGLE, to ensure high level of security with low hardware overhead incorporated for error detection. This cipher offers efficient performance in both hardware and software implementation using bit-slice techniques. To the best of authors' knowledge, no prior error detection scheme has been presented in literature for RECTANGLE to date. The proposed error detection schemes that are provided for the S-box layer, Player, and for the round structures with 80-bit or 128-bit key sizes, are benchmarked on field-programmable gate array (FPGA) hardware platform to assess their suitability. The error coverage of these schemes is close to 100% (assessed with fault injection simulation) and the induced overheads are low, increasing the reliability of the hardware architectures of RECTANGLE.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130992477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors 采用栅极和块驱动晶体管的10gb /s低功耗低压CTLE

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841171

Amin Aghighi, A. Alameh, M. Taherzadeh‐Sani, F. Nabki

引用次数: 7

Broadband SOI PA with tunable matching network for improved LTE performances under high VSWR 带可调匹配网络的宽带SOI PA在高驻波比下提高LTE性能

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841245

A. Serhan, P. Ferris, A. Giry

引用次数: 1