A fully integrated switch capacitor step down DC-DC converter in 65nm bulk CMOS technology with peak efficiency tracking

C. Veri, M. Pasca, Giuseppe Tau, S. D’Amico
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引用次数: 1

Abstract

This paper presents a DC-DC converter to be embedded in the pixel front-end of detectors in Large Hadron Collider (LHC) experiment at CERN. The DC-DC converter has to operate in a hostile environment due to the radiation. Under radiation, the value of the resistances, Ron, of the MOS switches changes. In addition, the load current, Iout, can change, ranging around the nominal value of 400mA from 200mA to 600mA. Both Ron and Iout, determine the optimum frequency that maximize the efficiency. In order to improve the efficiency as the operation conditions of the DC-DC converter changes, a tracking circuit of the peak efficiency was implemented. The tracking circuit performs a closed loop control of the clock frequency of the DC-DC converter. This converter provides an 800mV output voltage from a 1.2V input supply reaching an 80.22% peak efficiency. It is integrated in 65nm bulk CMOS technology with an area of 1.31mm2.
完全集成的开关电容降压DC-DC转换器,采用65nm体CMOS技术,具有峰值效率跟踪
本文介绍了一种嵌入在欧洲核子研究中心大型强子对撞机(LHC)实验探测器像素前端的DC-DC转换器。由于辐射,DC-DC转换器必须在恶劣的环境中运行。在辐射作用下,MOS开关的电阻值Ron发生变化。此外,负载电流Iout可以在200mA到600mA的标称值400mA左右变化。Ron和Iout都确定了使效率最大化的最佳频率。为了提高DC-DC变换器工作条件变化时的效率,设计了峰值效率跟踪电路。跟踪电路对DC-DC变换器的时钟频率进行闭环控制。该转换器从1.2V输入电源提供800mV输出电压,达到80.22%的峰值效率。它集成了65纳米体CMOS技术,面积为1.31mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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