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2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)最新文献

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RC and RL to LC circuit conversion, and its application in poles and zeros identification RC和RL到LC电路的转换，及其在极点和零点识别中的应用
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841168
R. Hashemian
{"title":"RC and RL to LC circuit conversion, and its application in poles and zeros identification","authors":"R. Hashemian","doi":"10.1109/ICECS.2016.7841168","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841168","url":null,"abstract":"A new technique is presented to convert an RC or RL circuit to its corresponding LC circuit. It is shown that while this conversion keeps the coefficients of a transfer function unaltered, it maps the roots (poles and zeros) of the transfer function to desirable locations for further processing. The technique provides different results for different types of (real, imaginary, and complex) roots on the s-plain, which in fact lends itself to identifying and even extract the circuit roots directly from a Bode plot. Some applications of the methodology with examples are given to demonstrate the capability of the technique.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125470176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An integrated rad-hard test-vehicle for embedded emerging memories 嵌入式新兴存储器的集成抗辐射测试工具
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841118
Nicola Lupo, C. Calligaro, C. Wenger, F. Maloberti
{"title":"An integrated rad-hard test-vehicle for embedded emerging memories","authors":"Nicola Lupo, C. Calligaro, C. Wenger, F. Maloberti","doi":"10.1109/ICECS.2016.7841118","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841118","url":null,"abstract":"An integrated test vehicle architecture for resistive memories is presented. The designed structure, made by two 128kb arrays, allows a systematic characterization of the technology before, during and after the exposure to radiation. For this, after the motivation of the work, the architecture and the design solutions to achieve a high degree of tolerance to radiation effect are discussed; a radiation-hardening-by-design approach is used. A test chip, currently under fabrication, has been implemented using a 250nm CMOS technology.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123099577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LDO-assisted vs. linear-assisted DC/DC converters: A comprehensive study and comparison ldo辅助与线性辅助DC/DC转换器:综合研究与比较
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841143
V. Shirmohammadli, A. Saberkari, H. Martínez, E. Alarcón-Cot
{"title":"LDO-assisted vs. linear-assisted DC/DC converters: A comprehensive study and comparison","authors":"V. Shirmohammadli, A. Saberkari, H. Martínez, E. Alarcón-Cot","doi":"10.1109/ICECS.2016.7841143","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841143","url":null,"abstract":"This paper deals with a comprehensive study and comparison on the conventional linear-assisted converter and a new structure named, LDO-assisted converter based on a new class-AB LDO regulator instead of the conventional linear one, in terms of efficiency, output ripple, and load transient response. The new structure reduces difference between input and output voltages and also switching frequency of the buck converter, corresponding to higher power efficiency, desired for power management systems of battery operated devices like biomedical implants and energy harvesting applications. A comparison analysis is done and the results are validated in HSPICE in a 0.18 μm CMOS process.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114055673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
All-digital transceivers — Recent advances and trends 全数字收发器-最新进展和趋势
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841175
André Prata, R. Cordeiro, Daniel C. Dinis, Arnaldo S. R. Oliveira, J. Vieira, N. Carvalho
{"title":"All-digital transceivers — Recent advances and trends","authors":"André Prata, R. Cordeiro, Daniel C. Dinis, Arnaldo S. R. Oliveira, J. Vieira, N. Carvalho","doi":"10.1109/ICECS.2016.7841175","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841175","url":null,"abstract":"This paper provides an overview on recent advances on all-digital transceivers, as a promising approach to the ideal Software-Defined Radio concept. Several techniques and architectural optimizations are discussed to improve the coding efficiency, spectral purity, signal to noise ratio, bandwidth and flexibility.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125610685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Electrostatic energy harvester based on multiple variable capacitors 基于多可变电容的静电能量采集器
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841248
Yin Li, M. Misra, S. Gregori
{"title":"Electrostatic energy harvester based on multiple variable capacitors","authors":"Yin Li, M. Misra, S. Gregori","doi":"10.1109/ICECS.2016.7841248","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841248","url":null,"abstract":"This paper presents an electrostatic harvester of vibration energy based on multiple variable capacitors. Conventional electrostatic energy harvesters rely on a single variable capacitor working when driven by vibrations of sufficient amplitude and frequency. The proposed harvester is suitable for applications with low vibration amplitude and frequency because it can start in lower vibration conditions without increasing the size of the device. A harvester prototype based on four variable capacitors was developed, and its performance was measured and analyzed.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127566048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A closed-form energy model for VLSI circuits under wide voltage scaling 宽电压标度下VLSI电路的闭合能量模型
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841260
Saurabh Jain, M. Alioto
{"title":"A closed-form energy model for VLSI circuits under wide voltage scaling","authors":"Saurabh Jain, M. Alioto","doi":"10.1109/ICECS.2016.7841260","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841260","url":null,"abstract":"This work introduces a closed-form energy model for VLSI circuits that covers a wide voltage range, from deep subthreshold to nominal supply voltage. The model predicts the energy consumption of a given VLSI design based on a few technology- and design-dependent parameters that are obtained from few selected circuit simulations and synthesis reports. The proposed model permits to predict how energy scales down at low voltages (including the minimum energy point), based on the results of place and route at nominal voltage only. The proposed model was applied to a 256-point complex radix-4, Modified Multiple Delay Commutator (MMDC) FFT design in 40nm CMOS. The model was found to capture well the effect of micro-architectural design (e.g., pipe-depth) and technology parameters (e.g., process/voltage/temperature corner). A typical error of less than 5% was observed in the near- and above-threshold voltage region. Overall, the proposed model allows for quick design exploration under wide voltage scaling, while avoiding time-consuming multi-corner and multi-voltage design and simulations. Hence, the proposed model is a useful tool that supports early selection of the best design options having the desired energy profile at low voltages.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127674913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Towards chip scale components for optical coherence tomography 光学相干层析成像的芯片级元件
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841134
F. Nabki, M. Ménard, Jonathan Brière, M. Elsayed, M. Rahim
{"title":"Towards chip scale components for optical coherence tomography","authors":"F. Nabki, M. Ménard, Jonathan Brière, M. Elsayed, M. Rahim","doi":"10.1109/ICECS.2016.7841134","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841134","url":null,"abstract":"Recent work to create components for the miniaturization of optical coherence tomography (OCT) systems is presented. The proposed approach relies on the micro-fabrication of microelectromechanical systems (MEMS) electrostatic actuators with integrated optical components onto the same die. This can enable very compact and cost effective components that have the potential of reducing the cost and form-factor of OCT systems. In this paper, the progress on two integrated OCT subsystems is presented: a continuously-variable optical delay line and a wavelength-swept filter. These components are suitable to implement time-domain or frequency-domain OCT, respectively. The integrated rapidly tunable optical delay line is based on a laterally rotating MEMS micro-mirror, while the swept filter is based on a rotating MEMS micro-motor.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"132 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131992387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
RJ/DJ jitter decomposition technique for high speed links 高速链路的RJ/DJ抖动分解技术
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841269
Klodjan Bidaj, J. Bégueret, Jerome Deroo
{"title":"RJ/DJ jitter decomposition technique for high speed links","authors":"Klodjan Bidaj, J. Bégueret, Jerome Deroo","doi":"10.1109/ICECS.2016.7841269","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841269","url":null,"abstract":"With the continuously increasing demand for higher bandwidth, bit rates of high speed serial links (USB, SATA, PCI-express, etc.) have reached the multi-gigabits per second. The transmitted jitter at a given bit error rate is one of the major electrical parameters used to characterize SerDes Integrated Circuit performance. The standard organizations specify RJ and DJ budgets. Decomposing the jitter into random and deterministic jitter would help designers to achieve desired Figure of Merit for future SerDes versions. We extend in this paper our previous technique [1] for jitter analysis and decomposition, in order to be used for any kind of noise profiles (white and colored noise profiles). Jitter decomposition simulations on generated white and colored noise patterns verify the extended decomposition algorithm works properly.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124946742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems 扩展FreeRTOS以支持多处理器系统中的动态和分布式映射
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841301
Geancarlo Abich, Marcelo G. Mandelli, Felipe Rosa, F. Moraes, Luciano Ost, R. Reis
{"title":"Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems","authors":"Geancarlo Abich, Marcelo G. Mandelli, Felipe Rosa, F. Moraes, Luciano Ost, R. Reis","doi":"10.1109/ICECS.2016.7841301","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841301","url":null,"abstract":"With the ever-increasing complexity of both embedded application workloads and multiprocessor platforms grows the demand for efficient mapping heuristics able of allocating several application workloads at runtime. The majority of promoted mapping techniques are bespoke implementations that consider an in-house operating system, which is developed to a particular architecture, restricting its adoption in other platforms. This work proposes a FreeRTOS extension that supports distributed task mapping heuristics, which enables to balance application workloads in multiprocessor architectures at runtime. Promoted extension is validated through a trustworthy number of scenarios considering large scale Cortex-M-based multiprocessor systems executing up to 600 application tasks.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125038679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
3D-HEVC depth maps intra prediction complexity analysis 3D-HEVC深度图内部预测复杂度分析
2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI: 10.1109/ICECS.2016.7841204
G. Sanchez, R. Cataldo, Ramon Fernandes, L. Agostini, C. Marcon
{"title":"3D-HEVC depth maps intra prediction complexity analysis","authors":"G. Sanchez, R. Cataldo, Ramon Fernandes, L. Agostini, C. Marcon","doi":"10.1109/ICECS.2016.7841204","DOIUrl":"https://doi.org/10.1109/ICECS.2016.7841204","url":null,"abstract":"This paper presents a complexity analysis of 3D High Efficiency Video Coding (3D-HEVC) depth maps intra prediction. The 3D-HEVC inserts new coding tools in depth maps intra prediction such as Depth Intra Skip (DIS), Depth Modeling Modes (DMMs) and Segment-wise DC (SDC). Therefore, it is important to understand the complexity of each module to allow the design of new complexity reduction techniques to encode the depth maps. This paper aims to guide other works to the most time-consuming tools that could be simplified to achieve a real-time design according to the encoding context.","PeriodicalId":205556,"journal":{"name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122465675","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
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