{"title":"Verilog-A modeling of Organic Electrochemical Transistors","authors":"P. Sideris, S. Siskos, G. Malliaras","doi":"10.1109/MOCAST.2017.7937645","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937645","url":null,"abstract":"An Organic Electrochemical Transistor model written in Verilog-A, a high level analog hardware description language, is presented. Using a polynomial approximation of the transistor DC characteristics, various phenomena in the operation of the device could be modeled. The error between experimental and simulated data was estimated very low for all cases of the simulated results. The model was imported in HSPICE and several test circuits were simulated.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115537034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nikolaos Toulgaridis, E. Bougioukou, T. Antonakopoulos
{"title":"Architecture and implementation of a Restricted Boltzmann Machine for handwritten digits recognition","authors":"Nikolaos Toulgaridis, E. Bougioukou, T. Antonakopoulos","doi":"10.1109/MOCAST.2017.7937689","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937689","url":null,"abstract":"Restricted Boltzmann Machines are artificial neural networks used in many types of statistical classification. In this work we present the architecture and implementation of such a neural network for fast recognition of hand-written digits. We use fixed and floating point arithmetic for minimizing the required hardware resources, and the use of pipeline results to a processing rate of more than 1 Mimages/sec per RBM. Four neural networks have been used on a PCIe-based hardware accelerator that uses a Virtex-7 FPGA, and that results to a total processing rate of more than 4 Mimages/sec.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124467407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. K. Varotsos, H. Nistazakis, Michalis P. Ninos, G. Tombras, A. Tsigopoulos, C. Volos
{"title":"DF relayed FSO communication systems with time dispersion over Gamma Gamma turbulence and misalignment","authors":"G. K. Varotsos, H. Nistazakis, Michalis P. Ninos, G. Tombras, A. Tsigopoulos, C. Volos","doi":"10.1109/MOCAST.2017.7937688","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937688","url":null,"abstract":"Free Space Optical (FSO) communications have recently attracted a renewed commercial and research interest. However, the performance of such terrestrial wireless optical links is strongly degraded by the pointing errors effect between the trans-receivers terminals and by the atmospheric turbulence effect whose impact becomes even more detrimental by the propagation distance. In order to combat this combined distance-dependent turbulence-induced and misalignment-induced fading we often resort to place relays along the line-of-sight propagation path. Thus, intermediate shorter hops are created which can lead to significant performance improvements. Additionally, by adjusting as information bit carriers, negative chirped Gaussian pulses with narrow initial pulse width, the also distant-dependent time dispersion effect can further ameliorate the FSO performance for some initial, i.e. hop distance. In view of the above, a typical terrestrial FSO system is considered that may employ serial Decode-and-Forward (DF) relaying configurations over a wide turbulence range, modeled through the very accurate Gamma-Gamma distribution model, along with the presence of time dispersion effect and different amounts of pointing mismatch. Under these assumptions, the performance of the FSO system is evaluated by means of its probability of fade metric. Closed-form expressions for the probability of fade of such DF relay-assisted FSO systems are derived, which along with the numerical results, demonstrate the beneficial impact on the FSO performance due to DF relays employment and time dispersion effect, under specific link's characteristics.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114149205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Trigger and readout electronics for the phase-I upgrade of the ATLAS forward muon spectrometer","authors":"P. Moschovakos","doi":"10.1109/MOCAST.2017.7937658","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937658","url":null,"abstract":"The upgrades of the LHC accelerator and the experiments in 2019/20 and 2023/24 will increase the instantaneous and integrated luminosity, but also will drastically increase the data and trigger rates. To cope with the huge data flow while maintaining high muon detection efficiency and reducing fake muons found at Level-1, the present ATLAS small wheel muon detector will be replaced with a New Small Wheel (NSW) detector for high luminosity LHC runs. The NSW will feature two new detector technologies: resistive micromegas (MM) and small strip Thin Gap Chambers (sTGC) conforming a system of ∼2.4 million readout channels. Both detector technologies will provide trigger and tracking primitives. A common readout path and a separate trigger path are developed for each detector technology. The electronics design of such a system will be implemented in about 8000 front-end boards, including the design of a number of custom radiation tolerant Application Specific Integrated Circuits (ASICs), capable of driving trigger and tracking primitives to the backend trigger processor and readout system. The large number of readout channels, the short period of time available to prepare and transmit trigger data, the high-speed output data rate, the harsh radiation environment, and the low power consumption, all impose great challenges to the system design. The overall design, development and performance of various prototypes and integration efforts will be presented.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131134943","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Derivation of the transfer functions of 1-bit Multi-Step Look-Ahead ΣΔ modulators using system identification methods","authors":"Kostas Touloupas, Charis Basetas, P. Sotiriadis","doi":"10.1109/MOCAST.2017.7937690","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937690","url":null,"abstract":"A method to calculate the transfer functions of Multi-Step Look-Ahead (MSLA) ΣΔ modulators is presented. MSLA ΣΔ modulators exhibit better noise shaping characteristics and stability than conventional ones. They are comprised of a number of conventional ΣΔ modulators in parallel, sharing a multi-input 1-bit output quantizer. MSLA modulators are highly nonlinear systems due to the multi-input quantizer. Modeling of the quantizer using conventional linearization methods does not give satisfactory results. Therefore, this work applies system identification methods to derive the linearized MSLA modulator system transfer functions. More specifically the Vector Fitting algorithm is used for the linearization of a number of MSLA modulators. The obtained transfer functions are in very good agreement with simulation results, showcasing the effectiveness of the applied methods.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"307 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133716995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"BTI and HCI degradation detection in SRAM cells","authors":"Yiorgos Sfikas, Y. Tsiatouhas","doi":"10.1109/MOCAST.2017.7937664","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937664","url":null,"abstract":"The influence of Bias-Temperature Instability (BTI) and Hot Carrier Injection (HCI) on Static Random Access Memory (SRAM) aging is of major importance. In this paper a circuit for the periodic monitoring of BTI and HCI degradation in SRAM cells is proposed. Periodic aging monitoring provides the ability to avoid failures in the memory array by locating and replacing over-degraded cells. The proposed scheme exploits a low cost differential ring oscillator that can be easily embedded in a typical SRAM without affecting its normal mode of operation.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125310665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Cache activity profiling tool for the LEON4 processor","authors":"M. Ntogramatzi, P. Katsaros, S. Nikolaidis","doi":"10.1109/MOCAST.2017.7937660","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937660","url":null,"abstract":"The performance of modern systems depends significantly on the cache activity. Hence, tools that monitor the cache performance are very useful for optimization of the software or even, whenever this is possible, the hardware, of a system. In this paper, a tool that provides statistics about the cache activity of the LEON4-N2X embedded system is discussed. The tool analyzes the memory access trace of a program executed bare metal and calculates, with the use of the reuse distance, the latency added by the cache activity. Furthermore, the tool measures all the misses occurred and classifies them per their cause.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125592268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Cloud services using hardware accelerators: The case of handwritten digits recognition","authors":"E. Bougioukou, N. Toulgaridis, T. Antonakopoulos","doi":"10.1109/MOCAST.2017.7937620","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937620","url":null,"abstract":"In the era of cloud computing and storage, high performance servers are used for achieving improved accuracy in various application areas. Although local processing is viable in many cases, collecting data from multiple sources and processing them in a server results to optimum parameters estimation for achieving the best possible performance in terms of accuracy. In this work, we present the case of a high performance computing engine for detecting the correct values of handwritten digits. The system exploits a hardware accelerator that implements multiple neural networks for digit recognition and the whole system architecture is presented. Experimental results demonstrate the performance of the implemented system using a Power8 server and a PCIe hardware accelerator.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130920534","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Michalis P. Ninos, H. Nistazakis, A. Stassinakis, G. K. Varotsos, G. Tombras, C. Volos
{"title":"Block error rate estimation for wireless optical communication links over strong turbulence channels with pointing errors","authors":"Michalis P. Ninos, H. Nistazakis, A. Stassinakis, G. K. Varotsos, G. Tombras, C. Volos","doi":"10.1109/MOCAST.2017.7937687","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937687","url":null,"abstract":"Free-space optical communication systems are gaining popularity as a high-capacity, cost-effective and license-free wireless technology, addressing the bandwidth demands of existing and future wireless networks. The deployment scenarios of free pace optical links usually concern secure, fast and reliable connections. Thus, in this work, the performance of optical wireless communication systems is studied in terms of the average block error rate which constitutes a very significant metric for their reliability. The optical signal transmission is assumed to be hampered by the joint effects of strong atmospheric turbulence, modeled by the Negative Exponential and the pointing errors effect which affects the alignment between the transmitter and the receiver. Accurate closed-form expression for the evaluation of the average block error rate is obtained, including the aforementioned effects, while finally the corresponding numerical results, for realistic optical wireless links, are presented.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124428362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"BPSim: An integrated missrate, area, and power simulator for branch predictor","authors":"Chaobing Zhou, Libo Huang, Q. Dou","doi":"10.1109/MOCAST.2017.7937661","DOIUrl":"https://doi.org/10.1109/MOCAST.2017.7937661","url":null,"abstract":"When designing the branch predictors in processors, designers not only need to consider the prediction accuracy, but also should pay attention to the die-area occupied by the predictor, power consumption and other issues. Previous simulations of branch predictors have either only considered accuracy, or used low-speed full system simulators. We presents BPSim, a fast simulation environment for branch predictor based on trace driven, combining accuracy, area, and power consumption. Within this environment, the design parameters of the TAGE branch predictor with superior performance are automatically explored by the given RAM size and GHR length as input.","PeriodicalId":202381,"journal":{"name":"2017 6th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"77 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133749069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}