Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)最新文献_第8页

Automatic constraint transformation with integrated parameter space exploration in analog system synthesis 模拟系统综合中集成参数空间探索的自动约束变换

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759983

N. Dhanwada, A. Núñez-Aldana, R. Vemuri

引用次数: 9

Symmetry detection for automatic analog-layout recycling 用于自动模拟布局回收的对称检测

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759663

Y. Bourai, C. Shi

引用次数: 7

A timing-driven block placer based on sequence pair model 基于序列对模型的时序驱动砌块砂矿机

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760007

Gang Huang, Xianlong Hong, Changge Qiao, Yici Cai

引用次数: 2

Formal verification method for combinatorial circuits at high level design 组合电路高层设计的形式化验证方法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760023

J. Kitamichi, Hiroyuki Kageyama, N. Funabiki

引用次数: 1

Function smoothing with applications to VLSI layout 功能平滑与应用到VLSI布局

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760001

R. Baldick, A. Kahng, A. Kennings, I. Markov

引用次数: 11

Microprocessor technologies for the 21st century 21世纪的微处理器技术

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760043

R. Yung

引用次数: 0

A hardware/software partitioning algorithm for processor cores of digital signal processing 一种数字信号处理处理器核的硬件/软件划分算法

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.760027

N. Togawa, T. Sakurai, M. Yanagisawa, T. Ohtsuki

{"title":"A hardware/software partitioning algorithm for processor cores of digital signal processing","authors":"N. Togawa, T. Sakurai, M. Yanagisawa, T. Ohtsuki","doi":"10.1109/ASPDAC.1999.760027","DOIUrl":"https://doi.org/10.1109/ASPDAC.1999.760027","url":null,"abstract":"A hardware/software cosynthesis system for processor cores of digital signal processing has been developed. This paper focuses on a hardware/software partitioning algorithm which is one of the key issues in the system. Given an input assembly code generated by the compiler in the system, the proposed hardware/software partitioning algorithm first determines the types and the numbers of required hardware units, such as multiple functional units, hardware loop units, and particular addressing units, for a processor core (initial resource allocation). Second, the hardware units determined at initial resource allocation are reduced one by one while the assembly code meets a given timing constraint (configuration of a processor core). The execution time of the assembly code becomes longer but the hardware costs for a processor core to execute it becomes smaller. Finally, it outputs an optimized assembly code and a processor configuration. Experimental results demonstrate that the system synthesizes processor cores effectively according to the features of an application program/data.","PeriodicalId":201352,"journal":{"name":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133578135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Acceleration of linear block code evaluations using new reconfigurable computing approach 用新的可重构计算方法加速线性分组码的计算

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759985

H. Nagano, Takayuki Suyama, A. Nagoya

引用次数: 0

An analytical delay model for SRAM-based FPGA interconnections 基于sram的FPGA互连延迟分析模型

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759723

Zhou Feng, Huang Zhijun, T. Jiarong, T. Pushan

引用次数: 3

Hierarchical floorplan design on the Internet Internet上的分层平面图设计

Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Pub Date : 1999-01-18 DOI: 10.1109/ASPDAC.1999.759992

Jiann-Horng Lin, Jing-Yang Jou, I. Jiang

引用次数: 0