International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)最新文献_第6页

Microstructure and adhesion strength of copper substrate after oxidation with a newly developed chemical solution 一种新型化学溶液氧化后铜基体的微观结构和附着力

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904158

X. Fan, E. Chan, J. Yuen, A. Lam, N. Fan, Jingshen Wu, L. Weng, N. Mclellan

引用次数: 0

The applicability of electrodeposited photoresist in producing ultra-fine lines using sputtered seeding layers 电沉积光刻胶在溅射播种层制备超细线中的适用性

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904145

P. Jalonen, A. Tuominen

引用次数: 5

A viscoplastic constitutive model for 63Sn37Pb eutectic solders 63Sn37Pb共晶焊料的粘塑性本构模型

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904151

S. Yi, G. Luo, K. Chian, W.T. Chen

引用次数: 31

Plasma cleaning of chip scale packages for improvement of wire bond strength 晶片级封装的等离子清洗，以提高焊丝结合强度

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904189

L. Wood, C. Fairfield, K. Wang

引用次数: 18

Sintering process of low temperature cofired ceramics 低温共烧陶瓷的烧结工艺

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904195

Z. Han, J. Ma, Z. Xu, Q. Wang, L. Huang, Y. Li

引用次数: 1

Effects of build-up printed circuit board thickness on the solder joint reliability of a wafer level chip scale package (WLCSP) 积层印刷电路板厚度对晶圆级芯片规模封装(WLCSP)焊点可靠性的影响

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904141

J. Lau, S. Lee

引用次数: 64

Feasibility and reliability study on the electroless nickel bumping and stencil solder printing for low-cost flip chip electronic packaging 低成本倒装电子封装中化学镀镍和模板焊印刷的可行性和可靠性研究

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904136

Y. M. Chow, W. M. Lau, R. Schetty, Z. Karim

{"title":"Feasibility and reliability study on the electroless nickel bumping and stencil solder printing for low-cost flip chip electronic packaging","authors":"Y. M. Chow, W. M. Lau, R. Schetty, Z. Karim","doi":"10.1109/EMAP.2000.904136","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904136","url":null,"abstract":"We present a study on the feasibility and reliability of a low-cost flip chip technology using a combination of electroless nickel bumping and stencil solder printing. Circular aluminum bump pads of diameter 250 /spl mu/m and pitch 400 /spl mu/m with 200 /spl mu/m openings in the passivation layer were patterned for the study. Since it has been suggested that phosphorus from the electroless nickel solution will degrade the adhesion of solder, three types of electroless nickel deposits were prepared as the under bump metallurgy (UBM) consisting of electroless nickel-high phosphorous (EN-HP), electroless nickel-low phosphorous (EN-LP) and electroless nickel-boron (EN-B). Eutectic lead-tin solder paste of composition 63Sn-37Pb was screen-printed on the electroless nickel UBM followed by reflow at a peak temperature of 230/spl deg/C. The final solder bump height achieved was 155/spl plusmn/8 /spl mu/m. The shearing strength was found to decrease in the order of EN-B (1857.5 g/bump)>EN-LP (178/spl plusmn/8.7 g/bump)>EN-HP (170/spl plusmn/8.1 g/bump). Furthermore, multiple reflow caused a decrease of the shearing strength within 20%, indicating a satisfactory reliability of electroless nickel/stencil printed solder in wafer bumping. It was found by SEM/EDX analysis that the fracture occurred within the solder regardless of the type of electroless nickel. Further evaluation on bump height uniformity has indicated that the use of stencil printing technique for screen-printed bumps can be an effective low-cost method for fabrication of solder bumps on wafers.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125350398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Current underfills for CSP and BGA 目前CSP和BGA的地下填埋

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904161

T. Doba

{"title":"Current underfills for CSP and BGA","authors":"T. Doba","doi":"10.1109/EMAP.2000.904161","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904161","url":null,"abstract":"Chip scale packages (CSP) and ball grid arrays (BGA) are now major package types. In the introduction of CSP/BGA to the market, package reliability was one of the main issues and underfill was required to improve board level reliability (BLR). Flip chip underfill was utilized in applications, but it was relatively slow, required a high temperature cure and had to be kept in a freezer. This paper describes the concepts, development and performance of underfills for CSP/BGA, which the authors have developed recently. The concept of the new underfill for CSP/BGA was fast, low temperature curing with sufficient reliability, and that can be kept in a refrigerator for convenience in handling. Reworkable and nonreworkable underfills were discussed. Reworkability of the underfill is a general requirement in the market for replacement of defective CSP/BGA devices due to the many devices present on multilayer printed wiring boards in current integrated assemblies. One approach to reworkable materials is thermal degradation of the chemical linkages. A few examples, which were found in the current developmental work, are described in terms of degradation and reworkability.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122928937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Revisit of wirebonding on immersion silver-finish board 浸没银面板上的线接技术回顾

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904197

Y. Cheung, S. Or, A. Sze

引用次数: 3

Thermal deformations of CSP assembly during temperature cycling and power cycling CSP组件在温度循环和功率循环过程中的热变形

International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458) Pub Date : 2000-11-30 DOI: 10.1109/EMAP.2000.904179

S. Ham, M. S. Cho, S. Lee

{"title":"Thermal deformations of CSP assembly during temperature cycling and power cycling","authors":"S. Ham, M. S. Cho, S. Lee","doi":"10.1109/EMAP.2000.904179","DOIUrl":"https://doi.org/10.1109/EMAP.2000.904179","url":null,"abstract":"In this paper, thermal deformations of CSP assemblies during temperature cycling and power cycling were investigated using high sensitivity moire interferometry and finite element analysis. To observe the thermal deformations during thermal cycling, a moire test was performed for isothermal loading conditions from 125/spl deg/C to 25/spl deg/C. In the case of power cycling, the actual operating conditions were simulated by using a thermal chip in the package, and the real-time moire interferometry technique was used to measure the steady-state thermal deformation. The results show that the assembly bends in the opposite direction in power cycling as compared to its bending during temperature cycling. In addition, test results obtained from the moire interferometry technique were compared with predicted values obtained from finite element analysis. It is shown that the deformation values predicted from finite element analysis have good agreement with those obtained from the test. The FEM results show that the shear deformations of solder joints are almost same, but the normal deformations are fundamentally different between temperature cycling and power cycling.","PeriodicalId":201234,"journal":{"name":"International Symposium on Electronic Materials and Packaging (EMAP2000) (Cat. No.00EX458)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124612636","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 34