Plasma cleaning of chip scale packages for improvement of wire bond strength

L. Wood, C. Fairfield, K. Wang
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引用次数: 18

Abstract

As the integrated circuit becomes ever smaller, the associated decrease in size of the wire bond pad, on both the chip and leadframe or BGA, brings many new and substantial challenges to the chip-scale packaging engineer. This decrease in size is generally linked to not only poor wire bond pull strength but also poor wire bond strength uniformity. In spite of this, there are techniques that will enhance wire bond strength and improve uniformity. One technique is the use of radio-frequency-driven, low-pressure plasmas to clean the bond pad surfaces and prepare them for wire bonding. Here, we report findings on the use of RF plasmas to clean wire bond pads and sites prior to wire bonding.
晶片级封装的等离子清洗,以提高焊丝结合强度
随着集成电路变得越来越小,芯片和引线框架或BGA上的线键焊板尺寸的减小,给芯片级封装工程师带来了许多新的和实质性的挑战。这种尺寸的减小通常不仅与钢丝粘结强度差有关,而且与钢丝粘结强度均匀性差有关。尽管如此,还是有一些技术可以提高金属丝的结合强度和均匀性。一种技术是使用射频驱动的低压等离子体清洁键合垫表面,并为导线键合做准备。在这里,我们报告了使用射频等离子体清洁焊盘和焊点的研究结果。
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