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A 75 V Lateral IGBT for Junction-Isolated Smart Power Technologies 用于结隔离型智能电源技术的75v横向IGBT
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 2006-06-04 DOI: 10.1109/ISPSD.2006.1666106
B. Bakeroot, J. Doutreloigne, P. Moens
{"title":"A 75 V Lateral IGBT for Junction-Isolated Smart Power Technologies","authors":"B. Bakeroot, J. Doutreloigne, P. Moens","doi":"10.1109/ISPSD.2006.1666106","DOIUrl":"https://doi.org/10.1109/ISPSD.2006.1666106","url":null,"abstract":"A 75 V, lateral insulated gate bipolar transistor (LIGBT) is demonstrated in a junction-isolated technology. This device is implemented in a standard smart power technology with a 0.35mum CMOS core. The nLIGBT exhibits a fourfold increase in current density compared to a nVDEMOS in the same technology. A double buried layer structure effectively suppresses substrate currents, provides the floating capability (the nLIGBT can be used as a high-side switch), ensures high latching currents, and yields fast switching speeds","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128850337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Electrical and Physical Characterization of 150-200V FLYMOSFETs 150-200V flymosfet的电学和物理特性
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 2006-06-04 DOI: 10.1109/ISPSD.2006.1666131
Jaume Roig, Y. Weber, J. Reynes, Frédéric Morancho, E. Stefanov, M. Dilhan, Gérard Sarrabayrouse
{"title":"Electrical and Physical Characterization of 150-200V FLYMOSFETs","authors":"Jaume Roig, Y. Weber, J. Reynes, Frédéric Morancho, E. Stefanov, M. Dilhan, Gérard Sarrabayrouse","doi":"10.1109/ISPSD.2006.1666131","DOIUrl":"https://doi.org/10.1109/ISPSD.2006.1666131","url":null,"abstract":"A vertical n-channel 150V-200V FLYMOSFET is proposed in this work for the first time. Initially, spreading resistance profiling, scanning capacitance microscopy and process simulation are used to provide an accurate 1D and 2D device physical characterization. Concerning the electrical study, FLYMOSFET measurements show superior RonS-BVdss trade-off in comparison with the conventional power MOSFET and improved UIS ruggedness in front of the super junction MOSFET","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121725561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Electro-Thermal Simulation of Current Filamentation in 3.3-kV Silicon p+- n-- n+Diodes with Differenth Edge Terminations 3.3 kv不同边端p+- n—n+硅二极管电流丝化的电热模拟
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 2006-06-04 DOI: 10.1109/ISPSD.2006.1666059
H. Felsl, E. Falck, F. Niedernostheide, S. Milady, D. Silber, J. Lutz
{"title":"Electro-Thermal Simulation of Current Filamentation in 3.3-kV Silicon p+- n-- n+Diodes with Differenth Edge Terminations","authors":"H. Felsl, E. Falck, F. Niedernostheide, S. Milady, D. Silber, J. Lutz","doi":"10.1109/ISPSD.2006.1666059","DOIUrl":"https://doi.org/10.1109/ISPSD.2006.1666059","url":null,"abstract":"We investigate the current filamentation behavior during reverse recovery in high-voltage 3.3-kV silicon p+ - n- - n+ diodes with transient S-shape negative differential resistance characteristics. The transient I-U-bistability occuring in the reverse recovery period leads to a non-uniform, current distribution in the diodes when they are turned off with a high current rate di/dl. In this paper we compare the filament behavior of diodes without any edge termination with that of diodes providing a non-optimized JTE (junction termination extension), an optimized JTE, and a beveled edge termination by means of isothermal and electro-thermal device simulations. The observed differences are explained by analyzing the transient electric-field, current-density and temperature distributions in the devices","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114983487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A Landmark in Electrical Performance of IGBT Modules Utilizing Next Generation Chip Technologies 利用下一代芯片技术的IGBT模块电气性能的里程碑
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 2006-06-04 DOI: 10.1109/ISPSD.2006.1666060
A. Kopta, M. Rammo, S. Eicher, U. Schlapbach
{"title":"A Landmark in Electrical Performance of IGBT Modules Utilizing Next Generation Chip Technologies","authors":"A. Kopta, M. Rammo, S. Eicher, U. Schlapbach","doi":"10.1109/ISPSD.2006.1666060","DOIUrl":"https://doi.org/10.1109/ISPSD.2006.1666060","url":null,"abstract":"The aim of this work is to demonstrate that future high power IGBT modules will be capable of providing electrical performance not matched to date in terms of low losses, soft turn-off characteristics, square RBSOA, and full over-current and over-voltage self-protection mechanisms under fault conditions. First ever prototype modules were fabricated incorporating heavily paralleled 3300V chips employing the next generation enhanced-planar IGBT (EP-IGBT) technology and the field charge extraction diode (FCE) concept. In this paper, we show that the two technologies will provide the module with outstanding characteristics, therefore promising higher levels of performance in tomorrow's applications. In addition, we present a set of results where two 3300V IGBT modules were tested in parallel under extreme RBSOA conditions with a forced temperature difference of up to 100 degC. The modules were capable of turning off 6000A at a DC-link voltage of 2600V in spite of the temperature induced current mismatch and associated redistribution mechanisms","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132885486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Floating Island and Thick Bottom Oxide Trench Gate MOSFET (FITMOS) -60V Ultra Low ON-Resistance Novel MOSFET with Superior Internal Body Diode- 浮岛和厚底氧化沟槽栅极MOSFET (FITMOS) - 60v超低导通电阻的新型MOSFET，具有卓越的内部二极管
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 2005-05-23 DOI: 10.1109/ISPSD.2005.1487946
H. Takaya, K. Miyagi, K. Hamada, Y. Okura, N. Tokura, A. Kuroyanagi
{"title":"Floating Island and Thick Bottom Oxide Trench Gate MOSFET (FITMOS) -60V Ultra Low ON-Resistance Novel MOSFET with Superior Internal Body Diode-","authors":"H. Takaya, K. Miyagi, K. Hamada, Y. Okura, N. Tokura, A. Kuroyanagi","doi":"10.1109/ISPSD.2005.1487946","DOIUrl":"https://doi.org/10.1109/ISPSD.2005.1487946","url":null,"abstract":"A MOSFET structure named FITMOS has been successfully developed and exhibits record-low loss in the 60 volt breakdown voltage range. The device has a body diode with superior reverse recovery characteristics and exhibits an extremely small value for RonQgd. The distinctive feature of this device is the use of floating islands formed by self-alignment and trench gates with a thick oxide layer on the bottom. This structure can also be used for the terminal portion of the device, so the increase in the number of fabrication process steps is less than 5%. Moreover, the rate of non-defective-gates in 3-by-4-mm rectangular devices on an 8-inch wafer is at least 98%.","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121176814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Active Fuse 活跃的保险丝
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 1900-01-01 DOI: 10.1109/ispsd.2006.1666088
S. Berberich, M. Mârz, A. Bauer, S. Beuer, H. Ryssel
{"title":"Active Fuse","authors":"S. Berberich, M. Mârz, A. Bauer, S. Beuer, H. Ryssel","doi":"10.1109/ispsd.2006.1666088","DOIUrl":"https://doi.org/10.1109/ispsd.2006.1666088","url":null,"abstract":"In this work, we propose an active fuse which is a novel power device to prevent serious hazards in power electronics in the case of a fault. Using this active fuse, power devices or parts of power electronic circuits which are in an undefined, uncontrollable condition can be disconnected reliable and irreversible from the power supply. Critical safety consequences of faults like overheating or fire will be avoided. The focus of this work was to develop a monolithic integrated crowbar circuit including a fusible element $the active fuse - with an application range from 1A to 5A and 48V at an operating temperature of 175degC","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126914346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Breakthrough of on-resistance Si limit by Super 3D MOSFET under 100V breakdown voltage 超级3D MOSFET在100V击穿电压下突破导通电阻Si极限
2006 IEEE International Symposium on Power Semiconductor Devices and IC's Pub Date : 1900-01-01 DOI: 10.1109/ispsd.2006.1666071
H. Yamaguchi, Y. Urakami, J. Sakakibara
{"title":"Breakthrough of on-resistance Si limit by Super 3D MOSFET under 100V breakdown voltage","authors":"H. Yamaguchi, Y. Urakami, J. Sakakibara","doi":"10.1109/ispsd.2006.1666071","DOIUrl":"https://doi.org/10.1109/ispsd.2006.1666071","url":null,"abstract":"Under 100V breakdown voltage, a new device structure is required for the purpose of reducing on-resistance and for high reliability. In this study, it was demonstrated that the Si limit of on-resistance was broken by super 3D MOSFET structure that we had already proposed in an actual prototype fabrication. Its on-resistance was 16.4mOmegamiddotmm2 at the breakdown voltage of 58V. Moreover, it was clarified that the UIS (undamped inductive switching) endurance of this device was 3.08 J/cm2 with 3 mm times 3 mm size chip and this result is 1.5 times stronger than that of conventional structure. This super 3D structure was fabricated by unique simplified trench filling epitaxial process and high aspect ratio trench etching process. The super 3D MOSFET is very attractive for automotive motor drive use","PeriodicalId":198443,"journal":{"name":"2006 IEEE International Symposium on Power Semiconductor Devices and IC's","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114714141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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