{"title":"Design of a high-frequency second-order /spl Delta//spl Sigma/ modulator","authors":"F. Luo, R. Unbehauen, T. Ndjountche","doi":"10.1109/ISCAS.2005.1465148","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465148","url":null,"abstract":"As the minimum feature size of VLSI technologies scales down, more of the signal processing tasks are performed in the digital domain, making the analog-to-digital converter (ADC) design critical. High speed designs can be achieved by using oversampling ADC structures. At high sampling rates, the resolution appears to be limited by amplifier settling requirements. Design techniques to improve the ADC performance are presented. The proposed modulator structure uses the double-sampled technique, which increases by a factor of two the maximum speed of operation and correctly operates even with low DC gain amplifiers.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128340073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Quantization offsets for video coding","authors":"T. Wedi, S. Wittmann","doi":"10.1109/ISCAS.2005.1464590","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464590","url":null,"abstract":"In this paper we propose a modification in the H.264/AVC quantization scheme for transform coefficients. This modification is based on a simple offset that provides a more accurate adjustment of the quantizer, especially of the dead-zone size, to the signal statistics. Compared to a deadzone adjustment that is H.264/AVC compliant, the proposed modification improves the coding efficiency and the subjective picture quality. Although there are several other applications that would benefit from the proposed quantization offset, the experimental results in this paper are restricted to coding of HD movies that contain film grain. A quantizer modification for such high quality consumer applications leads to significantly improved subjective picture quality.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"122 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128494247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the identifiability of bilinear systems","authors":"R. Ober, Zhiping Lin, Q. Zou","doi":"10.1109/ISCAS.2005.1465450","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465450","url":null,"abstract":"Estimation of the unknown parameters that characterize a bilinear system is of primary importance in many applications. By introducing a novel concept of the derivative system for a given bilinear system, it is shown that the Fisher information matrix for a data set generated by a bilinear system with additive Gaussian measurement noise can be expressed explicitly in terms of the outputs of its derivative system which is also bilinear. A connection between the identifiability of the unknown parameters and the output reachability of the derivative system is established. For a bilinear system with a piecewise constant input and uniformly sampled output data, a trackable condition is derived for local identifiability.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128559174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Canards in a slow-fast continuous piecewise linear vector field","authors":"H. Nakano, H. Honda, H. Okazaki","doi":"10.1109/ISCAS.2005.1465447","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465447","url":null,"abstract":"Canards are phenomena which occur in slow-fast systems when the parameter, /spl epsiv/, is appropriately small. An RLC circuit with a five-segment piecewise linear resistor, namely a two-dimensional five region continuous piecewise linear (CPWL) vector field, is considered. The paper discusses rigorously the canard in the four region CPWL vector field, in the case of /spl epsiv//spl rarr/0, and verification of the boundary canard without head and canard with head in the four region.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128574021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuits","authors":"M. Hooper, M. Kucic, P. Hasler","doi":"10.1109/ISCAS.2005.1464540","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464540","url":null,"abstract":"This paper presents integration of high voltage charge-pumps for programming analog floating-gate (FG) circuits in a standard 0.5 /spl mu/m CMOS N-well double poly process. In this research two different Dickson charge-pumps are integrated for the control of electron tunneling and hot-electron injection in a floating-gate element. A six stage design implemented with Schottky rectifiers is used to modulate tunneling and a three stage design using high voltage transistors is used to modulate injection. Controlling the frequency of the Schottky charge-pump is an on-chip clock. The on-chip clock, a 7 stage ring oscillator was designed to operate to approximately 10 MHz for controlling the Schottky charge-pump. Experimental results of hot-electron injection, clock performance and electron tunneling are presented.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128604899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new robust Kalman filter algorithm under outliers and system uncertainties","authors":"S. Chan, Zhiguo Zhang, K. Tse","doi":"10.1109/ISCAS.2005.1465586","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465586","url":null,"abstract":"This paper proposes a new robust Kalman filter algorithm under outliers and system uncertainties. The robust Kalman filter of Durovic and Kovacevic (1999) is extended to include unknown-but-bounded parameter uncertainties in the state or observation matrix. We first formulate the robust state estimation problem as an M-estimation problem, which leads to an unconstrained nonlinear optimization problem. This is then linearized and solved iteratively as a series of linear least-squares problems. These least-squares problems are subject to the bounded system uncertainties using the robust least squares method proposed by A. Ben-Tal and A. Nemirovski (2001). Simulation results show that the new algorithm leads to a better performance than the conventional algorithms under outliers as well as system uncertainties.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124611552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"System on chip FPGA design of an FM demodulator using a Kalman band-pass sigma-delta architecture","authors":"S. Abeysekera, C. Charayaphan","doi":"10.1109/ISCAS.2005.1464517","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464517","url":null,"abstract":"An efficient architecture for a Kalman band-pass sigma-delta (/spl Sigma/-/spl Delta/) demodulator used in the application of FM demodulation is presented. The IF stage of the circuit separates the in-phase and quadrature (I and Q) signals using a single circuit path, thus eliminating I-Q differences due to component mismatch. The separated I-Q signals are then filtered using an efficient recursive Kalman band-pass filter. The completed FM demodulator system is designed and implemented in hardware using FPGA (field programmable gate array). The flexible and programmable system on chip FM demodulator is described. The synthesis results of the FPGA design are reported.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129482591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Juho Lahti, Jari K. Juntunen, O. Lehtoranta, T. Hämäläinen
{"title":"Algorithmic optimization of H.264/AVC encoder","authors":"Juho Lahti, Jari K. Juntunen, O. Lehtoranta, T. Hämäläinen","doi":"10.1109/ISCAS.2005.1465374","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465374","url":null,"abstract":"Several platform independent optimizations for a baseline profile H.264/AVC encoder are described. The optimizations include adaptive diamond pattern based motion estimation, fast sub-pel motion vector refinement and heuristic intra prediction. In addition, loop unrolling, early out thresholds and adaptive inverse transforms are used. An experimental complexity analysis is presented studying effect of optimizations on the encoding frame rate on the AMD Athlon processor. Trade-offs in rate-distortion performance are also measured. Compared to a public reference encoder, speed-ups of 4-8 have been obtained with 0.6-0.8 dB loss in image quality. In practice, our software only H.264 encoder achieves an encoding rate of 86 QCIF frames/s that is well above real-time limits.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129663777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A framework for real time gesture recognition for interactive mobile robots","authors":"Randeep Singh, B. Seth, U. Desai","doi":"10.1109/ISCAS.2005.1465310","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1465310","url":null,"abstract":"Interactive mobile robots are an active area of research. The paper presents a framework for designing a real-time vision based hand-body gesture recognition system for such robots. The said framework works in real world lighting conditions, with complex backgrounds, and can handle intermittent motion of the camera. We present a novel way in which the MHI (motion history images) and MEI (motion energy images) are built. The input signal is captured by a singular monocular color camera. Vision is the only feedback sensor used. It is assumed that the gesturer is wearing clothes that are slightly different from the background. The motion and color cues are combined in a robust way. Gestures are first learned offline and then matched to the temporal data generated online in real time. We have tested this on a gesture database consisting of 11 hand-body gestures and have recorded recognition accuracy up to 90%.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129904553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and analysis of a micropower low-voltage bang-bang control class D amplifier","authors":"T. Ge, M. T. Tan, J. Chang","doi":"10.1109/ISCAS.2005.1464565","DOIUrl":"https://doi.org/10.1109/ISCAS.2005.1464565","url":null,"abstract":"We describe the design of a novel bang-bang control class D amplifier for low-voltage power-critical applications, including hearing instruments (hearing aids). We analyze the design parameters for the amplifier and determine the relationships between these parameters. The relationships derived herein provide good insight to the design of the amplifier to meet a given specification. We verify our theoretical analyses of some of the design parameters by comparing them against computer simulations. We also show that our bang-bang control class D amplifier features micropower dissipation, low harmonic non-linearities and is suitable for hearing instruments.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129907282","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}