{"title":"System on chip FPGA design of an FM demodulator using a Kalman band-pass sigma-delta architecture","authors":"S. Abeysekera, C. Charayaphan","doi":"10.1109/ISCAS.2005.1464517","DOIUrl":null,"url":null,"abstract":"An efficient architecture for a Kalman band-pass sigma-delta (/spl Sigma/-/spl Delta/) demodulator used in the application of FM demodulation is presented. The IF stage of the circuit separates the in-phase and quadrature (I and Q) signals using a single circuit path, thus eliminating I-Q differences due to component mismatch. The separated I-Q signals are then filtered using an efficient recursive Kalman band-pass filter. The completed FM demodulator system is designed and implemented in hardware using FPGA (field programmable gate array). The flexible and programmable system on chip FM demodulator is described. The synthesis results of the FPGA design are reported.","PeriodicalId":191200,"journal":{"name":"2005 IEEE International Symposium on Circuits and Systems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE International Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2005.1464517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
An efficient architecture for a Kalman band-pass sigma-delta (/spl Sigma/-/spl Delta/) demodulator used in the application of FM demodulation is presented. The IF stage of the circuit separates the in-phase and quadrature (I and Q) signals using a single circuit path, thus eliminating I-Q differences due to component mismatch. The separated I-Q signals are then filtered using an efficient recursive Kalman band-pass filter. The completed FM demodulator system is designed and implemented in hardware using FPGA (field programmable gate array). The flexible and programmable system on chip FM demodulator is described. The synthesis results of the FPGA design are reported.