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2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)最新文献

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Transistor-level optimization of CMOS complex gates CMOS复合栅极的晶体管级优化
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519029
V. Possani, F. Marques, L. Rosa, V. Callegaro, A. Reis, Renato P. Ribas
{"title":"Transistor-level optimization of CMOS complex gates","authors":"V. Possani, F. Marques, L. Rosa, V. Callegaro, A. Reis, Renato P. Ribas","doi":"10.1109/LASCAS.2013.6519029","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519029","url":null,"abstract":"This paper presents a new methodology to generate efficient transistor networks. Transistor-level optimization consists in an effective possibility to increase design quality when generating CMOS logic gates to be inserted in standard cell libraries. Starting from an input ISOP, the proposed method is able to deliver series-parallel and non-series-parallel arrangements with reduced transistor count. The experiments performed over the set of 4-input P-class Booleans functions have demonstrated the efficiency of the proposed approach.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121264173","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Fast floorplanning with placement constraints 快速地板规划与安置限制
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519081
Shantesh Pinge, Rajeev K. Nain, M. Chrzanowska-Jeske
{"title":"Fast floorplanning with placement constraints","authors":"Shantesh Pinge, Rajeev K. Nain, M. Chrzanowska-Jeske","doi":"10.1109/LASCAS.2013.6519081","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519081","url":null,"abstract":"Today's deep sub-micron technology and large complex designs have elevated the need for floorplanning to handle placement constraints. We present a unified method to handle alignment and cluster constraints on sequence pair representation. It helps pruning infeasible solutions on sequence pair and significantly reduces the solution space, therefore speeding up the algorithm. We also present an implementation methodology for fast evaluation of these constraints. Experimental results on MCNC and GSRC benchmarks demonstrate that our approach is 4.6X faster on average, scalable with good packing as compared to other published approaches.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128107123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Inductorless very small 2nd derivative Gaussian IRUWB transmitter module using n/p-latches as PDs in CMOS technology 在CMOS技术中使用n/p锁存器作为pd的无电感器非常小的二阶导数高斯IRUWB发射机模块
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519077
L. C. Moreira, J. F. Neto, W. Noije, E. Torres-Rios
{"title":"Inductorless very small 2nd derivative Gaussian IRUWB transmitter module using n/p-latches as PDs in CMOS technology","authors":"L. C. Moreira, J. F. Neto, W. Noije, E. Torres-Rios","doi":"10.1109/LASCAS.2013.6519077","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519077","url":null,"abstract":"In this paper, a new design for an Impulse Radar UWB transmitter using an 180nm CMOS process is presented. A 2nd order derivative Gaussian pulse is generated using two Phase Detectors (PDs), which consist of an n-latch and a p-latch to generate a single UWB pulse without any filtering and matches the FCC mask. The Gaussian impulse achieves a very small pulse of 288ps width, 160mVpp amplitude, and consumes about 13μW/pulse. The circuit occupies only 36×42μm2 without PADs.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134016284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis and design of ultra-low-voltage inductive ring oscillators for energy-harvesting applications 用于能量收集的超低电压环形电感振荡器的分析与设计
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6518995
M. B. Machado, M. C. Schneider, C. Galup-Montoro
{"title":"Analysis and design of ultra-low-voltage inductive ring oscillators for energy-harvesting applications","authors":"M. B. Machado, M. C. Schneider, C. Galup-Montoro","doi":"10.1109/LASCAS.2013.6518995","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6518995","url":null,"abstract":"This paper presents inductive ring oscillators that operate from supply voltages of around two times the thermal voltage (2kT/q), for energy-harvesting applications. Expressions for the oscillation frequency as well as the minimum transistor gain and supply voltage required for the start-up oscillations are derived. The ring oscillators were built with zero-VT transistors due to their high drive capability at low voltages. Measurement results obtained in a ring oscillator prototype integrated in a 130 nm technology confirmed operation of the oscillator with 53 mV of supply voltage.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115518417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique 基于谐波对消技术的混合信号BIST正弦信号生成
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519084
M. Barragán, G. Léger, D. Vázquez, A. Rueda
{"title":"Sinusoidal signal generation for mixed-signal BIST using a harmonic-cancellation technique","authors":"M. Barragán, G. Léger, D. Vázquez, A. Rueda","doi":"10.1109/LASCAS.2013.6519084","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519084","url":null,"abstract":"This work presents a technique for the generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. The proposed generation technique is based on a modified analog filter, that provides a sinusoidal output as the response to a DC input, combined with a harmonic cancellation technique. It has the attributes of digital programming and control, low area overhead, and low design effort, which make this approach very suitable as test stimulus generator for built-in test applications. Simulation results are provided in order to validate the proposed generation technique.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122058893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Closed form design of nearly equiripple low-pass FIR filters 近等纹低通FIR滤波器的封闭形式设计
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519094
P. Zahradnik, B. Simák, M. Vlcek
{"title":"Closed form design of nearly equiripple low-pass FIR filters","authors":"P. Zahradnik, B. Simák, M. Vlcek","doi":"10.1109/LASCAS.2013.6519094","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519094","url":null,"abstract":"A closed form design of nearly equiripple low-pass finite impulse response filters is introduced. The approximation is based on the generating polynomial, which is related to the iso-extremal polynomials. Formulas for the evaluation of the impulse response of the filter has been developed. The practical design procedure based on this approximation is presented. One example is included.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123942645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of a broadband beamformer based on trapezoidal filters and nested arrays 基于梯形滤波器和嵌套阵列的宽带波束形成器分析
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519022
I. Moazzen, P. Agathoklis
{"title":"Analysis of a broadband beamformer based on trapezoidal filters and nested arrays","authors":"I. Moazzen, P. Agathoklis","doi":"10.1109/LASCAS.2013.6519022","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519022","url":null,"abstract":"A broadband beamformer using nested arrays, multi-rate techniques and multi-dimensional filters, recently proposed in [11-12], will be analyzed in detail. Using appropriate subsampling in space and time for each nested subarray leads to signals with the same region of support (ROS) in the 2D frequency domain for all subarrays. This ROS will be shown to be the top octave of the signal bandwidth and can be used to obtain higher selectivity at low frequencies. An example of the beampattern obtained using the proposed approach illustrates the almost frequency-invariant response of the beamformer.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129820903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Program for symbolic analysis of mechatronic systems 机电系统符号分析程序
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519046
Z. Kolka, J. Kalous, V. Biolková, D. Biolek
{"title":"Program for symbolic analysis of mechatronic systems","authors":"Z. Kolka, J. Kalous, V. Biolková, D. Biolek","doi":"10.1109/LASCAS.2013.6519046","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519046","url":null,"abstract":"The paper presents a theoretical concept of a program for symbolic and semisymbolic analyses of dynamic properties of mechatronic systems with a view to the non-controlled and the controlled mechatronic drives, block-oriented regulators, and controlling electronic circuits. The systems analyzed can be composed of both basic elements and more complex behavioral blocks (regulators, converters, drives, etc.). All models are defined in an easily extensible library. Implemented algorithms for equation/matrix-based symbolic simplification allow obtaining symbolic expressions of acceptable complexity even for larger systems.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124577814","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Phase-locked loop simulations using the latency insertion method 使用延迟插入法进行锁相环仿真
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519090
J. Schutt-Ainé, P. Goh
{"title":"Phase-locked loop simulations using the latency insertion method","authors":"J. Schutt-Ainé, P. Goh","doi":"10.1109/LASCAS.2013.6519090","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519090","url":null,"abstract":"In this paper we present a novel and simple behavioral model based simulation method for PLLs. We also demonstrate the use of LIM for simulating PLLs. The methods exploit the latency in the PLL formulation and utilize a leapfrog time-stepping discretization scheme to solve for the transient response of the PLL. Various PLL dynamic responses such as lock-in, pull-in and pull-out conditions are simulated and comparisons with analytical solutions are depicted when available. Due to the formulation in the voltage-phase domain, the method does not suffer from the dual time scale problem which is a main issue in full transistor level simulations of PLLs.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128714847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Very-low-tranconductance CMOS amplifier using multi-tanh bulk-driven input stage with gate-controlled assymetry for Gm-C applications 极低跨导CMOS放大器，采用多节块驱动输入级，门控不对称，用于Gm-C应用
2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) Pub Date : 2013-05-23 DOI: 10.1109/LASCAS.2013.6519035
Óscar Robles, F. Barúqui
{"title":"Very-low-tranconductance CMOS amplifier using multi-tanh bulk-driven input stage with gate-controlled assymetry for Gm-C applications","authors":"Óscar Robles, F. Barúqui","doi":"10.1109/LASCAS.2013.6519035","DOIUrl":"https://doi.org/10.1109/LASCAS.2013.6519035","url":null,"abstract":"A novel structure of the multi-tanh bulk-driven input stage OTA is presented in this paper. The circuit was designed and simulated in a 130nm CMOS process. The results show a nominal transconductance of 1.593 nS with an input linear range of 400 mVpp, assuming a THD no greater than -40 dB. The system supply voltage is 1.2 V (given by the technology), and the power consumption goes up to 315.7 nW. The achieved ultra low transconductance, along with the wide linear range (33% of the dynamic range) makes the transconductor highly suitable for low-frequency biomedical Gm-C applications. Furthermore, Monte Carlo analysis was conducted and showed the circuit possesses high resilience to process variation and mismatch: transconductance's standard deviation lower than 4% of its nominal value, and maximum THD of -40 dB.","PeriodicalId":190693,"journal":{"name":"2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS)","volume":"01 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127292067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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