Proceedings of the Great Lakes Symposium on VLSI 2022最新文献_第3页

An Event Based Gesture Recognition System Using a Liquid State Machine Accelerator 基于事件的液体状态机加速器手势识别系统

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530357

Jing Zhu, Lei Wang, Xun Xiao, Zhijie Yang, Ziyang Kang, Shiming Li, LingHui Peng

引用次数: 0

LaBaNI: Layer-based Noise Injection Attack on Convolutional Neural Networks 基于层的卷积神经网络噪声注入攻击

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530385

Tolulope A. Odetola, Faiq Khalid, S. R. Hasan

引用次数: 0

Session details: Session 4A: Testing,Reliability and Fault Tolerance 会议详情:会议4A:测试、可靠性和容错

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3542688

Mark Zwolinski

引用次数: 0

The Improved COTD Technique for Hardware Trojan Detection in Gate-level Netlist 门级网表硬件木马检测的改进COTD技术

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530835

H. Salmani

{"title":"The Improved COTD Technique for Hardware Trojan Detection in Gate-level Netlist","authors":"H. Salmani","doi":"10.1145/3526241.3530835","DOIUrl":"https://doi.org/10.1145/3526241.3530835","url":null,"abstract":"Hardware Trojans (HTs) have introduced serious security concerns into the integrated circuit design flow as they can undermine circuit operations by leaking sensitive information, causing malfunction, or similar attacks. An earlier-introduced HT detection technique in gate-level netlist, the Controllability and Observability for hardware Trojan Detection (COTD) technique detects HTs based on controllability and observability signals in a circuit and presents a static analysis based on an unsupervised machine learning model to identify HT signals in the circuit. While COTD detects the existence of HTs in a circuit, some work has highlighted the shortcoming of COTD in detecting some HT signals that present similar features as genuine signals. To address this shortcoming, this paper presents an improved COTD technique. The improved COTD technique introduces an iterative unsupervised machine-learning technique to isolate HT signals. Furthermore, the improved COTD is equipped with the Gradual-N-Justification (GNJ) technique to reduce false-positive rates in detecting HT signals. The improved COTD technique is applied to several different combinations of full-scan and partial scan circuits tampered with hard-to-detect sequential HTs. To realize valid and hard-to-detect HTs, a configurable HT insertion platform is utilized. The comprehensive results have shown that the improved COTD is highly scalable. Furthermore, the improved COTD technique does not miss a HT circuit if exists and it offers a false-positive rate as low as 3.4%, on average.","PeriodicalId":188228,"journal":{"name":"Proceedings of the Great Lakes Symposium on VLSI 2022","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127352395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Session details: Session 1A: Hardware Security 会话详细信息:会话1A:硬件安全

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3542682

K. Gaj

引用次数: 0

Protecting Deep Neural Network Intellectual Property with Architecture-Agnostic Input Obfuscation 基于结构不可知输入混淆的深度神经网络知识产权保护

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530386

Brooks Olney, Robert Karam

{"title":"Protecting Deep Neural Network Intellectual Property with Architecture-Agnostic Input Obfuscation","authors":"Brooks Olney, Robert Karam","doi":"10.1145/3526241.3530386","DOIUrl":"https://doi.org/10.1145/3526241.3530386","url":null,"abstract":"Deep Convolutional Neural Networks (DCNNs) have revolutionized and improved many aspects of modern life. However, these models are increasingly more complex, and training them to perform at desirable levels is difficult undertaking; hence, the trained parameters represent a valuable intellectual property (IP) asset which a motivated attacker may wish to steal. To better protect the IP, we propose a method of lightweight input obfuscation that is undone prior to inference, where input data is obfuscated in order to use the model to specification. Without using the correct key and unlocking sequence, the accuracy of the classifier is reduced to a random guess, thus protecting the input/output interface and mitigating model extraction attacks which rely on such access. We evaluate the system using a VGG-16 network trained on CIFAR-10, and demonstrate that with an incorrect deobfuscation key or sequence, the classification accuracy drops to a random guess, with an inference timing overhead of 4.4% on an Nvidia-based evaluation platform. The system avoids the costs associated with retraining and has no impact on model accuracy for authorized users.","PeriodicalId":188228,"journal":{"name":"Proceedings of the Great Lakes Symposium on VLSI 2022","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131423710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Deep Neural Network and Transfer Learning for Accurate Hardware-Based Zero-Day Malware Detection 基于硬件的零日恶意软件精确检测的深度神经网络和迁移学习

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530326

Z. He, Amin Rezaei, H. Homayoun, H. Sayadi

{"title":"Deep Neural Network and Transfer Learning for Accurate Hardware-Based Zero-Day Malware Detection","authors":"Z. He, Amin Rezaei, H. Homayoun, H. Sayadi","doi":"10.1145/3526241.3530326","DOIUrl":"https://doi.org/10.1145/3526241.3530326","url":null,"abstract":"In recent years, security researchers have shifted their attentions to the underlying processors' architecture and proposed Hardware-Based Malware Detection (HMD) countermeasures to address inefficiencies of software-based detection methods. HMD techniques apply standard Machine Learning (ML) algorithms to the processors' low-level events collected from Hardware Performance Counter (HPC) registers. However, despite obtaining promising results for detecting known malware, the challenge of accurate zero-day (unknown) malware detection has remained an unresolved problem in existing HPC-based countermeasures. Our comprehensive analysis shows that standard ML classifiers are not effective in recognizing zero-day malware traces using HPC events. In response, we propose Deep-HMD, a two-stage intelligent and flexible approach based on deep neural network and transfer learning, for accurate zero-day malware detection based on image-based hardware events. The experimental results indicate that our proposed solution outperforms existing ML-based methods by achieving a 97% detection rate (F-Measure and Area Under the Curve) for detecting zero-day malware signatures at run-time using the top 4 hardware events with a minimal false positive rate and no hardware redesign overhead.","PeriodicalId":188228,"journal":{"name":"Proceedings of the Great Lakes Symposium on VLSI 2022","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132753435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge 基于边缘的CNN推理的内存中容错计算架构

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530351

M. Rios, Flavio Ponzina, G. Ansaloni, A. Levisse, David Atienza Alonso

{"title":"Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge","authors":"M. Rios, Flavio Ponzina, G. Ansaloni, A. Levisse, David Atienza Alonso","doi":"10.1145/3526241.3530351","DOIUrl":"https://doi.org/10.1145/3526241.3530351","url":null,"abstract":"The growing popularity of edge computing has fostered the development of diverse solutions to support Artificial Intelligence (AI) in energy-constrained devices. Nonetheless, comparatively few efforts have focused on the resiliency exhibited by AI workloads (such as Convolutional Neural Networks, CNNs) as an avenue towards increasing their run-time efficiency, and even fewer have proposed strategies to increase such resiliency. We herein address this challenge in the context of Bit-line Computing architectures, an embodiment of the in-memory computing paradigm tailored towards CNN applications. We show that little additional hardware is required to add highly effective error detection and mitigation in such platforms. In turn, our proposed scheme can cope with high error rates when performing memory accesses with no impact on CNNs accuracy, allowing for very aggressive voltage scaling. Complementary, we also show that CNN resiliency can be increased by algorithmic optimizations in addition to architectural ones, adopting a combined ensembling and pruning strategy that increases robustness while not inflating workload requirements. Experiments on different quantized CNN models reveal that our combined hardware/software approach enables the supply voltage to be reduced to just 650mV, decreasing the energy per inference up to 51.3%, without affecting the baseline CNN classification accuracy.","PeriodicalId":188228,"journal":{"name":"Proceedings of the Great Lakes Symposium on VLSI 2022","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128138935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing 使用覆盖引导模糊测试的高效跨层处理器验证

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530340

Niklas Bruns, V. Herdt, Daniel Große, R. Drechsler

引用次数: 5

IoT-enabled Soft Robotics for Electrical Engineers 面向电气工程师的物联网软机器人

Proceedings of the Great Lakes Symposium on VLSI 2022 Pub Date : 2022-06-06 DOI: 10.1145/3526241.3530369

P. Sundaravadivel, P. Ghosh, Bikal Suwal

引用次数: 5