2012 14th International Conference on Electronic Materials and Packaging (EMAP)最新文献

{"title":"A thermal performance assessment of panel type packaging (PTP) technology for high efficiency LED","authors":"Yen-Fu Su, Yu-Hsiang Yang, Wen-Kun Yang, K. Chiang","doi":"10.1109/EMAP.2012.6507886","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507886","url":null,"abstract":"In response to the effect of global warming, increasing number of industries have focused their attention on green technology products such as the light-emitting diode (LED), currently has been widely applied in many products because of its low pollution potential, low power consumption, and long life characteristics. Panel type packaging (PTP) technology, applicable in a wafer level packaging process, is one of the solutions for LED packaging structure. However, LED with low electro-optical conversion efficiency converts a high-percentage of the input power into redundant heat; thus, junction temperature increases. In this research, the finite element (FE) model of the PTP technology was developed by commercial software ANSYS® for high-power LED mounted on metal-core printed circuit board (MCPCB), composed of copper foil, dielectric layer, and aluminum base plate. The forward-voltage method for characterization of diodes was also employed to measure the junction temperature of PTP for LED packaging, validated with the FE results. Next, the effects of MCPCB dielectric material, MCPCB size, filler material, and black bismaleimide triazine (BT) substrate material were analyzed. In addition, the multi-chip LED module was also investigated. By adopting the design guideline determined by the FE analysis, the thermal performance of the PTP technology for LED can be improved further, enhancing its suitability for high-power LED application.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128869186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effect of gold concentration through a single dynamic wave soldering process","authors":"F. Che Ani, M. S. Abdul Aziz, A. Jalar, M. Z. Abdullah, P. Rethinasamy","doi":"10.1109/EMAP.2012.6507859","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507859","url":null,"abstract":"Gold possesses a unique combination of properties of particular value in the construction and operation of electrical and electronic equipment. These properties include low electrical resistivity and contact resistance, ease of thermal compression and high resistance to mechanical wear. Most efficient use is by employing gold, usually in the electroplated form, either as an intermediate layer in certain microelectronic devices, or as a finishing on such components as connectors, terminations, and printed circuits. This paper presents a study of interaction between tin-lead solder and pin, which are associated with intermetallic compound (IMC) after undergoing dynamic wave soldering. The aim of the study was to determine the effect of IMC formation to joint reliability by verifying the gold concentration as IPC J-Standards guidelines of a minimum of 3 wt% [1] [2] In our case study, the gold pins (without pre-tinned) are actually inserted directly into PCB and passed through dynamic wave soldering using wave pallet. The surface scanning electron microscopy and energy dispersive x-ray were used to reveal the concentration of gold present in the IMC microstructure after undergoing wave soldering (inserted into PCB). It was found that no gold presence for a thin PCB (thickness: 0.0596in or 1.514mm) and small percentage of gold presence (less than a minimum of 3 wt %) for a thick PCB (thickness: 0.30in or 7.62mm). Therefore, a double hot dip process is not required prior to assembly process.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125600703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Evaluation of the crystallographic quality of electroplated copper thin-film interconnections embedded in TSV structures","authors":"R. Furuya, Ken Suzuki, H. Miura","doi":"10.1109/EMAP.2012.6507852","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507852","url":null,"abstract":"Electroplated copper thin films have started to be applied to the Through Silicon Via (TSV) interconnections. Unfortunately, however, the electrical resistivity of the electroplated copper thin films was found to vary drastically comparing with those of the conventional bulk copper. This was because that the films consisted of grains with low crystallographic quality and a lot of porous grain boundaries. In this study, the electroplated copper thin film interconnections were embedded in a silicon substrate to model the TSV structure. It was observed that many voids and hillocks appeared on the surface of the films after annealed at 400°C. In addition, it was also found that the electrical resistivity of the films without annealing was much higher than that of bulk copper. As a result, it is very important to evaluate the crystallographic quality of the electroplated copper thin films after electroplated to assure the long-term reliability.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"211 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114413444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Supply chains for 3D IC integration manufacturing","authors":"J. Lau","doi":"10.1109/EMAP.2012.6507848","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507848","url":null,"abstract":"The supply chains for 3D IC integration manufacturing are studied in this investigation. Emphasis is placed on the ownerships of the technology supply chains such as the FEOL (front-end-of-line), MOL (middle-of-the-line), BEOL (back-end-of-line), TSV (through-silicon via), MEOL (middle-end-of-line), and package assembly and test. Some recommendations will be provided.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115173046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Preparation of copper nanoparticles with low sintering temperature","authors":"Dunying Deng, Yunxia Jin, Yuanrong Chen, Tianke Qi, F. Xiao","doi":"10.1109/EMAP.2012.6507927","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507927","url":null,"abstract":"This paper describes a simple and convenient method for the preparation of copper nanoparticles in aqueous solution at room temperature. The synthesis of copper nanoparticles from different types of copper salt was studied, with hydrazine and sodium hypophosphite as reducing reagent and lactic acid as capping agents. The stable copper nanoparticles with diameter less than 10 nm and a narrow size distribution were prepared with copper acetate as the precursor and hydrazine as reducing reagent. The obtained copper nanoparticles were capped by the carboxylic acids that can be completely removed at about 200 °C. The copper nanoparticles were characterized by TEM, UV-Vis, SEM and XRD. Copper films were prepared from the copper nanoparticles by drop coating and sintered at 150 and 200 °C for 60 min. in nitrogen.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127781481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Parametric modeling study of basic electrodeposition in microvias","authors":"N. Strusevich, Mayur K. Patel, C. Bailey","doi":"10.1109/EMAP.2012.6507864","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507864","url":null,"abstract":"In this paper, we present the results of a modeling study that investigates the material behavior in the electroplating process for the fabrication of micro-vias into printed circuit boards. The simulations are based on the technique that allows explicit tracking of the interface between the electrolyte and the deposited metal in each time step. The control parameters are the aspect ratio, copper ions concentration and initial current density. The response parameters are the filling time and two filling performance metrics.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"450 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116759449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An investigation on secondary EFO copper wire - from a nanoscale perspective view","authors":"H. Hsu, J. Chien, Chen-yi Wang, Cheng-che Liu, S. Fu, M. Bair","doi":"10.1109/EMAP.2012.6507897","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507897","url":null,"abstract":"The aim of present research is to investigate the characteristic of secondary EFO (electronic flame-off) Pd-coated copper wire. The term of “secondary” is twice EFO performed by a bonding apparatus, K&S 1488 wire bonder. As a result, secondary EFO Cu wire demonstrates a longer heat affected zone (HAZ) and a softer free air ball (FAB) which results in a decrease in the squeeze of aluminum bond pad. It is also observed that the surface roughness is a major factor to reduce the aluminum pad squeezing. The interfacial coefficient of frictional force at a nanoscale surface level was measured by Atomic Force Microscopy (AFM). The coefficient of frictional force needs to measure both the normal force (corresponds to loading force-distance curve) and a lateral force (corresponds to friction force) on a sliding contact. In addition, mechanical property of FAB surface on Pd-coated copper wire was determined by nanoindenter. A well-defined contact area is measured to study the frictional force and friction stress. Thermal aging effect has been conducted to reduce the strength of Cu wire and increase the reliability. The study of roughness parameters corresponds to evaluate the friction and the interfacial strengths. Local variation in nano tribology is also measured. Nanotribology is crucial in describing manipulations of molecules behavior. The measured surface topography (3D profiles) are then applied to determinate the potential energy in molecular dynamic (MD) method to study the atomic scale frictional interactions. A series of experimental works and MD predictions are conducted to investigate the interfacial behavior along the Cu FAB and Al Pad.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121251844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fatigue life and reliability prediction of electronic packages under thermal cycling conditions through FEM analysis and acceleration models","authors":"Xuhua Huang, Wen-Fang Wu, Po-Lun Chou","doi":"10.1109/EMAP.2012.6507914","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507914","url":null,"abstract":"Finite element analysis (FEA) is employed frequently in studying the reliability of electronic packing. In real practice of electronics industry, accelerated life testing (ALT) has also been employed extensively on finding the life and reliability of an electronic product or component. Under the common concern for reliability, an analytical process combining FEA with ALT in studying the electronic packaging is proposed in the present paper. A Wafer-Level Chip-Scale Package (WLCSP) subjected to various JEDEC prescribed thermal cycling conditions is illustrated as a numerical example. First, parameters concerning package size and material property in FEA are assumed to be random to account for their uncertainties. Fatigue life distributions and quantitative reliabilities of the package under various loading conditions are found. The influence of parametric uncertainties on fatigue life distribution and reliability is investigated. Secondly, regression analysis is conducted with results from the finite element analysis in order to find the parametric values of several acceleration models. The most appropriate acceleration model is then selected. The fatigue life and reliability of the package under various loading conditions are predicted based on the acceleration model together with the result of FEA. Finally, in addition to parameters of acceleration and life prediction models, thermal-mechanical properties are taken into account, and sensitivity analysis is performed to improve the life prediction accuracy. The result indicates that, in FEA, although parametric uncertainty influences the fatigue life distribution of the package, it affects little about the package's mean life. It is found that, compared with other acceleration models, the Norris-Landzberg model is more appropriate for ALT analysis of the studied WLCSP. It is also found that the maximum value of the cyclic temperature has significant impact on fatigue life prediction of the package. Based on a modified acceleration model, the prediction errors are found to be within 1.59%.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114184781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"In-line monitoring of the change of residual stress in nano-scale transistors during their thin-film processing and packaging","authors":"Hironori Tago, Ken Suzuki, H. Miura","doi":"10.1109/EMAP.2012.6507846","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507846","url":null,"abstract":"In this study, the change of the residual stress in transistors during their fabrication processes was analyzed by a finite element method (FEM) and measured by developed strain sensors. The sensors embedded in a PQC-TEG were applied to the measurement of the change of the residual stress in a nano-scale transistor structure during thin film processing. The change of the residual stress was successfully monitored through the process such as the deposition and etching of thin films. In addition, the fluctuation of the process such as the intrinsic stress of thin films and the height and the width of the etched structures was also detected by the statistical analysis of the measured data. The sensitivity of the measurement was 1 MPa and it was validated that the amplitude of the fluctuation during thin-film processing exceeded 100 MPa. This technique is also effective for detecting the spatial distribution of the stress in a wafer and its fluctuation among wafers.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124917329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of thermal fatigue sensor for electrical and electronic equipment","authors":"Yuya Minakata, Qiuang Yu, K. Takagi","doi":"10.1109/EMAP.2012.6507847","DOIUrl":"https://doi.org/10.1109/EMAP.2012.6507847","url":null,"abstract":"In this paper, authors proposed an original sensor which can measure thermal fatigue life of electronic equipment. The measurement principle of the sensor is that the joint was damaged by the stress due to a mismatch of thermal expansion between two materials. Finally, the joint was ruptured by the repeated stress. The priority subject was the feasibility of measurement accuracy of the sensor. Generally, a high level control of failure in joint is very difficult. To solve this problem, authors conceived the original design of the sensor. Then, the availability study of the original sensor for fracture control in joint was carried out using the crack propagation analysis. In the result, a high level control method for failure in joint of the sensor was achieved.","PeriodicalId":182576,"journal":{"name":"2012 14th International Conference on Electronic Materials and Packaging (EMAP)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124423300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}