Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.最新文献

Electrical contact resistance of silver with different coatings 不同镀层银的电接触电阻

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432050

B. Su, J. Qu

引用次数: 3

Epoxy/BaTiO/sub 3/ (SrTiO/sub 3/) composite films for high dielectric constant and low tolerance embedded capacitors fabrication in organic substrates 环氧树脂/BaTiO/sub - 3/ (SrTiO/sub - 3/)复合薄膜用于高介电常数和低容限的有机衬底嵌入式电容器的制造

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432080

K. Paik, Sung-Dong Cho, Jin-Gul Hyun, Sangyong Lee, Hyungsoo Kim, Joungho Kim

{"title":"Epoxy/BaTiO/sub 3/ (SrTiO/sub 3/) composite films for high dielectric constant and low tolerance embedded capacitors fabrication in organic substrates","authors":"K. Paik, Sung-Dong Cho, Jin-Gul Hyun, Sangyong Lee, Hyungsoo Kim, Joungho Kim","doi":"10.1109/ISAPM.2005.1432080","DOIUrl":"https://doi.org/10.1109/ISAPM.2005.1432080","url":null,"abstract":"Epoxy/BaTiO/sub 3/ composite embedded capacitor films (ECFs) were newly designed for high dielectric constant and low tolerance (less than /spl plusmn/5%) embedded capacitor fabrication in organic substrates. In terms of material formulation, ECFs were composed of specially formulated epoxy resin and latent curing agent. And in terms of coating process, a comma roll coating method was used for a uniform film thickness over large area. Dielectric constants of BaTiO/sub 3/ & SrTiO/sub 3/ composite ECFs were measured with MIM (metal-insulator-metal) capacitors at 100 kHz using LCR meter. Dielectric constants of BaTiO/sub 3/ ECFs were larger than these of SrTiO/sub 3/ ECFs, due to the difference of permittivity of BaTiO/sub 3/ and SrTiO/sub 3/ particles. Dielectric constants of BaTiO-, & SrTiO/sub 3/ ECFs at high frequency range (0.5/spl sim/10GHz) were measured using a cavity resonance method. For both powders, dielectric constants in high frequency range were about 3/4 of the dielectric constants at 1 MHz. This difference is mainly due to the decrease of dielectric constant of epoxy matrix. For BaTiO/sub 3/ ECFs, there was a dielectric relaxation at 5/spl sim/9GHz presumably due to the polarization mode change of BaTiO/sub 3/ powder. However in case of SrTiO/sub 3/ ECFs, there was no relaxation up to 10GHz.","PeriodicalId":181674,"journal":{"name":"Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115341467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An engineering model for moisture degradation of polymer/metal interfacial fracture toughness 聚合物/金属界面断裂韧性的水分降解工程模型

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432093

T. P. Ferguson, J. Qu

引用次数: 4

Design, fabrication, and reliability assessment of embedded resistors and capacitors on multilayered organic substrates 多层有机衬底上的嵌入式电阻和电容器的设计、制造和可靠性评估

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432084

K. Lee, S. Bhattacharya, M. Varadarajan, L. Wan, I. R. Abothu, V. Sundaram, P. Muthana, D. Balaraman, P. Raj, M. Swaminathan, S. Sitaraman, R. Tummala, P. Viswanadham, S. Dunford, J. Lauffer

{"title":"Design, fabrication, and reliability assessment of embedded resistors and capacitors on multilayered organic substrates","authors":"K. Lee, S. Bhattacharya, M. Varadarajan, L. Wan, I. R. Abothu, V. Sundaram, P. Muthana, D. Balaraman, P. Raj, M. Swaminathan, S. Sitaraman, R. Tummala, P. Viswanadham, S. Dunford, J. Lauffer","doi":"10.1109/ISAPM.2005.1432084","DOIUrl":"https://doi.org/10.1109/ISAPM.2005.1432084","url":null,"abstract":"Embedded passives provide a practical solution to microelectronics miniaturization. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to 50 percent of the entire printed circuit board area. By integrating passive components within the substrate, embedded passives reduce the system real estate, eliminate the need for discrete components and assembly of same, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated by Packaging Research Center (PRC) and Endicott Interconnect Technologies (EI). Resistors are carbon ink based polymer thick film (PTF) and NiCrAlSi, and capacitors are made with polymer/ceramic nanocomposite material. High frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JED EC standards are presented.","PeriodicalId":181674,"journal":{"name":"Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125343036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Studies of fine pitch patterning by reel-to-reel processes for flexible electronic systems 柔性电子系统用卷对卷加工精细节距图案的研究

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432062

A. Drost, G. Klink, M. Feil, K. Bock

引用次数: 8

3D integration of electronics and mechanics 电子和机械的三维集成

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432035

T. Peltola, P. Mansikkamaki, E. Ristolainen

{"title":"3D integration of electronics and mechanics","authors":"T. Peltola, P. Mansikkamaki, E. Ristolainen","doi":"10.1109/ISAPM.2005.1432035","DOIUrl":"https://doi.org/10.1109/ISAPM.2005.1432035","url":null,"abstract":"Nowadays, the design is one of the key features for all consumer products. All the novel functions must be available inside fashionable covers. However, the most interesting product shapes are not always possible due the restriction of the traditional rigid printed wiring board (PWB). To achieve a real design freedom, a formable multilayer PWB structure is needed. This paper introduces the three-dimensional printed wiring board and the 3D integration of electronics and mechanics. The 3D integration of electronics and mechanics increases design freedom and space utilization efficiency e.g. in portable devices. The 3D integration technology is enabled by thermoplastic PWB material innovations and a new kind of system integration process. Thermoplastics are formable and they are widely used in many fields, but as a substrate for a multilayer PWB, they are rather new. Furthermore, this paper discusses the benefits and challenges of the 3D integration of electronics and mechanics and the special characteristics of its system design process. Integration of electronics and mechanics has an effect on the design process management. Design phases must be coherent and teamwork needs to be well organized. In addition, special requirements for testing are presented.","PeriodicalId":181674,"journal":{"name":"Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131777521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Effect of laser welding sequence on WIAD in packaging of dual-in-line laser modules 激光焊接顺序对双直列激光模块封装WIAD的影响

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432071

Yaomin Lin, F. Shi

{"title":"Effect of laser welding sequence on WIAD in packaging of dual-in-line laser modules","authors":"Yaomin Lin, F. Shi","doi":"10.1109/ISAPM.2005.1432071","DOIUrl":"https://doi.org/10.1109/ISAPM.2005.1432071","url":null,"abstract":"The tolerance of aligning a single mode fiber to a laser in a fiber pigtailed laser diode module is extremely tight, a sub micron misalignment can often lead to a significant reduction in the power coupled into the fiber. Among various fiber-optic assembly approaches, laser welding is the one with submicron accuracy and is most conducive to process automation. However, the solidification and materials shrinkage during the laser welding process lead to a relative movement of the pre-aligned components: the welding-induced-alignment-distortion (WIAD). The WIAD is a serious issue and may significantly affect the packaging yield. Our previous investigation has demonstrated that an elimination or minimization of the WIAD in a butterfly laser module package is possible if laser welding process: the welding sequence, can be optimized. In this work, by means of numerical method of finite element analysis (FEA), the influence of the laser welding sequence on the WIAD in a dual-in-line package (DIP) is investigated using a realistic physics based laser-materials interaction model. The model combines the spatial and temporal characteristics of the laser beam and the thermophysical properties of the material. It is found that the influence of the welding sequence on the WIAD in packaging of the DIP could not be neglected, the WIAD can be minimized by the proper design of the welding process, for both of the butterfly and DIP packaging.","PeriodicalId":181674,"journal":{"name":"Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114464506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Comparative studies of green molding compounds for the encapsulation of Cu/low-k packages 铜/低钾封装用绿色成型化合物的比较研究

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432091

S. Chungpaiboonpatana, F. Shi, M. Todd, L. Crane

引用次数: 2

No-bleed die attach adhesives 无出血模贴胶

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432051

B. Neff, J. Huneke, M. Nguyen, P. Liu, T. Herrington, S.K. Gupta

引用次数: 7

Effects of current density on electromigration-induced failure in flip chip composite solder joints at room temperature 室温下电流密度对倒装片复合焊点电迁移失效的影响

Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Pub Date : 2005-03-16 DOI: 10.1109/ISAPM.2005.1432044

J. Nah, J. Suh, K. Paik, K. Tu

{"title":"Effects of current density on electromigration-induced failure in flip chip composite solder joints at room temperature","authors":"J. Nah, J. Suh, K. Paik, K. Tu","doi":"10.1109/ISAPM.2005.1432044","DOIUrl":"https://doi.org/10.1109/ISAPM.2005.1432044","url":null,"abstract":"The electromigration of flip chip solder joints consisting of 97Pb-3Sn and 37Pb-63Sn composite solders was studied under high current densities at room temperature. The MTTF (mean time to failure) and failure modes were found to be strongly dependant on the change of current density. The composite solder joints did not failed after one month stressed at 4.07 /spl times/ 10/sup 4/A/cm/sup 2/, but they failed after 10 hours of current stressing at 4.58 /spl times/ 10/sup 4/ A/cm/sup 2/. At a slightly higher current stressing of 5.00 /spl times/ 10/sup 4/ A/cm/sup 2/, they failed after only 0.6 hours by the melting of the composite solder bumps. Due to the precipitation and growth of Cu/sub 6/Sn/sub 5/ intermetallic compound at the cathode side, the Cu under bump metallurgy (UBM) was quickly consumed and followed by void formation at the contact area. The void reduced the contact area and displaced the electrical path, thus it affects greatly the current crowding and Joule heating inside the solder bump. A large Joule heating inside solder bumps can cause melting of the solder bump and the failure occurred quickly. The effect of void propagation on current crowding and Joule heating has been confirmed by simulation.","PeriodicalId":181674,"journal":{"name":"Proceedings. International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces, 2005.","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123469527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6