2008 International Conference on Advances in Electronics and Micro-electronics最新文献

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Review of Concepts Involved in Mixed PCBs Design for Electronic Devices 电子器件混合pcb设计概念综述
M. Sierra, J. Jiménez, E. Andino, J. Garate, J.L. Martin
{"title":"Review of Concepts Involved in Mixed PCBs Design for Electronic Devices","authors":"M. Sierra, J. Jiménez, E. Andino, J. Garate, J.L. Martin","doi":"10.1109/ENICS.2008.12","DOIUrl":"https://doi.org/10.1109/ENICS.2008.12","url":null,"abstract":"The present paper provides a review of the main concepts and principles involved in mixed PCBs (printed circuit board) design for electronic devices with mixed technologies, i.e. analog, RF (radio frequency) and digital components within the same PCB, such as characteristic impedance, layer stack-up and shielding.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123156190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Intellectual Property Protection of IP Cores at HDL Design Level with Automatic Signature Spreading 基于自动签名扩展的IP核在HDL设计层面的知识产权保护
E. Castillo, L. Parrilla, A. García, U. Meyer-Baese, A. Lloris
{"title":"Intellectual Property Protection of IP Cores at HDL Design Level with Automatic Signature Spreading","authors":"E. Castillo, L. Parrilla, A. García, U. Meyer-Baese, A. Lloris","doi":"10.1109/ENICS.2008.29","DOIUrl":"https://doi.org/10.1109/ENICS.2008.29","url":null,"abstract":"Watermarking techniques for Intellectual Property Protection (IPP) of IP cores at the HDL design level are proposed in this paper. The basic idea relies on spreading the bits of a digital signature at the HDL design level using combinational logic or look-up structures included within the original system. The techniques also include a secure and non-destructive signature extraction process. Furthermore, in this work the applicability has been extended due to the development of an automated tool for signature spreading purposes. Advances in the automated tool have been achieved by including new search algorithms, as the Simulated Annealing algorithm that achieves additional resources optimization while maintains reduced computation times. A detailed study of the research algorithms is carried out in order to show the advantages in terms of design effort, additional resources and execution times.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124976044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
CSDL & GLIDER: CAD Tools for Hardware Implementation of Cellular Automata CSDL & GLIDER:元胞自动机硬件实现的CAD工具
N. Jodar, J. Boluda, R. G. Gironés, V. Bosch
{"title":"CSDL & GLIDER: CAD Tools for Hardware Implementation of Cellular Automata","authors":"N. Jodar, J. Boluda, R. G. Gironés, V. Bosch","doi":"10.1109/ENICS.2008.35","DOIUrl":"https://doi.org/10.1109/ENICS.2008.35","url":null,"abstract":"Cellular Automata (CA) are discrete dynamical systems. Physically, a CA consists of consist of a lattice of discrete identical sites called cells, each one taking a value from a finite set. The values of the cells evolve in discrete steps according to deterministic rules that specify the value of the cell in terms of the values of the neighboring sites. Due to its massive parallelism, CA are not appropriated to be implemented on classical, sequential resources such as microprocessors, but adapt better to digital electronic structures such as FPGAs. In this paper, two tools oriented to the hardware implementations of CA are presented. CSDL is a language specifically oriented to define a wide range of cellular nets and, Glider, allows to make graphically these definitions and export it to a hardware description language.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"31 15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133269844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A In-depth Simulation Study of CMOS Inverters Based on the Novel Surrounding Gate Transistors 基于新型环栅晶体管的CMOS逆变器的深入仿真研究
A. Roldán, J. Roldán, F. Gámiz
{"title":"A In-depth Simulation Study of CMOS Inverters Based on the Novel Surrounding Gate Transistors","authors":"A. Roldán, J. Roldán, F. Gámiz","doi":"10.1109/ENICS.2008.8","DOIUrl":"https://doi.org/10.1109/ENICS.2008.8","url":null,"abstract":"The main features of CMOS inverters based on the novel surrounding gate transistors (SGT) have been analyzed. A Verilog-A compact model for the SGT has been implemented in a circuit simulator to study both analog and digital circuits. In particular, CMOS inverter gate delays, CMOS inverter ring oscillator frequencies, etc., have been obtained in order characterize the relations between the most representative technological parameters of the transistors and the inverter performance. The transient response of a ring oscillator is investigated to explore the scaling possibilities of these devices.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122225919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Theory Thermal Growth Control Techniques of High Speed Spindles 高速主轴热生长控制的理论研究
Ching-Feng Chang, Jin-Jia Chen, Tsair-Rong Chen
{"title":"A Theory Thermal Growth Control Techniques of High Speed Spindles","authors":"Ching-Feng Chang, Jin-Jia Chen, Tsair-Rong Chen","doi":"10.1109/ENICS.2008.37","DOIUrl":"https://doi.org/10.1109/ENICS.2008.37","url":null,"abstract":"A motorized high speed spindle has very complicated dynamics consisting of non-stationary and speed-related thermal characteristics. Many studies have reported different designs to control or monitor thermal spindle growth with limited results, whereas the application of high speed machining (HSM) demands ldquozero tolerancerdquo no matter the range of speed or material to be machined. This study will outline a direct displacement monitoring system that is capable of accurately monitoring and compensating for thermal growth associated with motorized high speed spindles. This system of monitoring and compensating is a considerable improvement compared to many take inaccurate readings through a traditional thermo coupler. The direct displacement measuring system, optimizing a high speed synchronous feedback system will meet the tolerance and performance expected in HSM applications. Based on the introduction of Foucault current, a design for an accurate thermal growth is outlined.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114578022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LightNet a Reliable Option for Lighting Applications LightNet是照明应用的可靠选择
J. Diaz, E. Rodriguez, L. Hurtado, H. Cacique, A. Ramirez, N. Vázquez
{"title":"LightNet a Reliable Option for Lighting Applications","authors":"J. Diaz, E. Rodriguez, L. Hurtado, H. Cacique, A. Ramirez, N. Vázquez","doi":"10.1109/ENICS.2008.10","DOIUrl":"https://doi.org/10.1109/ENICS.2008.10","url":null,"abstract":"This paper describes a lighting network proposal, named LightNet, for remote monitoring and controlling of lighting nodes, being lighting lamps and local environment sensors. The network is based on the Controller Area Network (CAN) bus protocol. The LightNet was experimentally implemented using CAN 2.0A with only six network node, but the proposal can be expanded up to 2048 nodes. The LightNet system software allows defined network functions be featured through one personal computer (PC) connected to the lighting network. Experimental tests were made for the defined network functions and according to obtained results the proposed LightNet performed the established functions successfully allowing in this way the implementation of a novel fully functional CAN bus lighting network with a reliable two wire remote control. Applications for LightNet are building management or studio lighting where lamps control is required for saving energy consumption, performing lamp maintenance or creating precision lighting effects.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129403589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Mixed HW-SW System for Fast Codebook Generation with the LBG Algorithm 基于LBG算法的快速码本生成混合HW-SW系统
A. Ramírez-Agundis, R. Gadea-Gironés, R. Colom-Palero, J. Díaz-Carmona
{"title":"A Mixed HW-SW System for Fast Codebook Generation with the LBG Algorithm","authors":"A. Ramírez-Agundis, R. Gadea-Gironés, R. Colom-Palero, J. Díaz-Carmona","doi":"10.1109/ENICS.2008.31","DOIUrl":"https://doi.org/10.1109/ENICS.2008.31","url":null,"abstract":"This paper presents the logical structure and physical design of a mixed software-hardware system developed for fast codebook generation using the well known LBG algorithm. The system uses a neurocoprocessor based on a Self Organization Feature Map (SOM) in order to make a HW-SW partition of algorithm tasks. The clustering task, the most time demanding, is carried out by hardware, exploiting the intrinsic parallelism of neural networks. The reduction in the required amount of sequential operations is proportional to 2N/Log2N, where N is the codebook final size. The experimentation showed a training time reduction up to 90%.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114757412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Mapping SysML State Machine Diagram to Time Petri Net for Analysis and Verification of Embedded Real-Time Systems with Energy Constraints 将SysML状态机图映射到时间Petri网用于具有能量约束的嵌入式实时系统分析与验证
E. Carneiro, P. Maciel, G. Callou, E. Tavares, B. Nogueira
{"title":"Mapping SysML State Machine Diagram to Time Petri Net for Analysis and Verification of Embedded Real-Time Systems with Energy Constraints","authors":"E. Carneiro, P. Maciel, G. Callou, E. Tavares, B. Nogueira","doi":"10.1109/ENICS.2008.19","DOIUrl":"https://doi.org/10.1109/ENICS.2008.19","url":null,"abstract":"The main objective of this paper is to propose a solution for modeling, analysis and verification of embedded real-time systems with energy constraints. For that, we combine functionalities of the SysML models and annotation from MARTE with the advantages of using time Petri net. This formalism allows analysis and verification of functional, timing and energy requirements in early phases of the development lifecycle. In order to depict the practically usability of the proposed method, a real-world case study is presented, namely, pulse-oximeter. Experimental results have demonstrated an accuracy of 96% using the proposed formal method in comparison with the values obtained with the hardware platform.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125394068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
Directly Modulated Laser Intrinsic Parameters Optimization for WDM Systems WDM系统直接调制激光本征参数优化
C. del Rio Campos, P. R. Horche
{"title":"Directly Modulated Laser Intrinsic Parameters Optimization for WDM Systems","authors":"C. del Rio Campos, P. R. Horche","doi":"10.1109/ENICS.2008.25","DOIUrl":"https://doi.org/10.1109/ENICS.2008.25","url":null,"abstract":"Direct modulation schemes have involved increased attention during the past few years because of their intrinsic simplicity and cost-effectiveness, especially when applied to WDM metro and access networks. However, the output power waveform from a directly modulated laser is not an exact replica of the current modulation and its instantaneous optical frequency varies with time depending on the changes in the optical power (an effect also known as frequency chirp). In this work, using an Optical Communication System Design Software, we studied a directly modulated WDM 2.5 Gb/s system. We have demonstrated that transmission performance depends strongly on DML characteristics. Furthermore, simulation results provided further details about the effects of DML type (adiabatic or transient chirp dominated) as well as the effects of the optical output power. These details can provide useful design guidelines for the design of a WDM metro network.","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"1126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134105347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Pulse Generation from Gain-Switched Vertical Cavity Surface Emitting Laser at 1.5 µm 增益开关垂直腔面发射激光1.5µm脉冲的产生
A. Consoli, I. Esquivias, F. J. López-Hernández, S. Balle, J. Mulet
{"title":"Pulse Generation from Gain-Switched Vertical Cavity Surface Emitting Laser at 1.5 µm","authors":"A. Consoli, I. Esquivias, F. J. López-Hernández, S. Balle, J. Mulet","doi":"10.1109/ENICS.2008.30","DOIUrl":"https://doi.org/10.1109/ENICS.2008.30","url":null,"abstract":"Optical pulses with duration below 60 ps were generated by gain-switching a vertical cavity surface emitting laser (VCSEL) emitting at 1.53 m. We used a radio frequency (RF) sinusoidal signal to modulate the device near threshold. Relaxation oscillations and pulse train generation were observed depending on the gain switching conditions. We have characterized the dependence of the pulse width and amplitude on the RF excitation frequency and amplitude for different bias currents. The optimal configuration of the current bias and RF modulating signal provided the shortest pulse duration of 57 ps at a frequency of 800 MHz.P","PeriodicalId":162793,"journal":{"name":"2008 International Conference on Advances in Electronics and Micro-electronics","volume":"28 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132679663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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