Mapping SysML State Machine Diagram to Time Petri Net for Analysis and Verification of Embedded Real-Time Systems with Energy Constraints

E. Carneiro, P. Maciel, G. Callou, E. Tavares, B. Nogueira
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引用次数: 33

Abstract

The main objective of this paper is to propose a solution for modeling, analysis and verification of embedded real-time systems with energy constraints. For that, we combine functionalities of the SysML models and annotation from MARTE with the advantages of using time Petri net. This formalism allows analysis and verification of functional, timing and energy requirements in early phases of the development lifecycle. In order to depict the practically usability of the proposed method, a real-world case study is presented, namely, pulse-oximeter. Experimental results have demonstrated an accuracy of 96% using the proposed formal method in comparison with the values obtained with the hardware platform.
将SysML状态机图映射到时间Petri网用于具有能量约束的嵌入式实时系统分析与验证
本文的主要目标是提出一种具有能量约束的嵌入式实时系统建模、分析和验证的解决方案。为此,我们将SysML模型和MARTE注释的功能与使用时间Petri网的优点结合起来。这种形式允许在开发生命周期的早期阶段对功能、时间和能量需求进行分析和验证。为了描述所提出的方法的实际可用性,提出了一个现实世界的案例研究,即脉搏血氧计。实验结果表明,与硬件平台得到的结果相比,所提出的形式化方法的精度达到96%。
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