{"title":"Analytical and FEM simulations of the thermal spreading effect in LED modules and IR thermography validation","authors":"A. Corfa, A. Gasse, S. Bernabé, H. Ribot","doi":"10.1109/ESIME.2010.5464567","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464567","url":null,"abstract":"Thermal management is a key issue in LED packaging. To keep the LED junction temperature as low as possible, one has to address the spreading effect from a localised heat source into a bigger substrate as it is the case in the Chip On Board configuration (COB). We performed a benchmark of the existing analytical models for the spreading effect and derived a new model that allows a better prediction of the thermal resistance in such LED COB modules. This new analytical model, implemented in a Scilab application, was first assessed in different cases with the Finite Element Method (FEM) software Ansys®. Besides, IR thermography was performed on different kind of modules allowing a direct comparison with the analytical and FEM predictions. In addition to correctly fit the the predictions, IR thermography measurements enabled to give rise to the important thermal effect of the die attach material used to bond the LED to the substrate. We demonstrated that AuSn solder exhibit higher performances than other low melting point solders and Ag-based adhesive.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115613876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mario Gonzalez, B. Vandevelde, W. Christiaens, Y. Hsu, F. Iker, F. Bossuyt, J. Vanfleteren, O. van der Sluis, P. Timmermans
{"title":"Thermo-mechanical analysis of flexible and stretchable systems","authors":"Mario Gonzalez, B. Vandevelde, W. Christiaens, Y. Hsu, F. Iker, F. Bossuyt, J. Vanfleteren, O. van der Sluis, P. Timmermans","doi":"10.1109/ESIME.2010.5464566","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464566","url":null,"abstract":"This paper presents a summary of the modeling and technology developed for flexible and stretchable electronics. The integration of ultra thin dies at package level, with thickness in the range of 20 to 30 ¿m, into flexible and/or stretchable materials are demonstrated as well as the design and reliability test of stretchable metal interconnections at board level are analyzed by both experiments and finite element modeling. These technologies can achieve mechanically bendable and stretchable subsystems. The base substrate used for the fabrication of flexible circuits is a uniform polyimide layer, while silicones materials are preferred for the stretchable circuits. The method developed for chip embedding and interconnections is named Ultra Thin Chip Package (UTCP). Extensions of this technology can be achieved by stacking and embedding thin dies in polyimide, providing large benefits in electrical performance and still allowing some mechanical flexibility. These flexible circuits can be converted into stretchable circuits by replacing the relatively rigid polyimide by a soft and elastic silicone material. We have shown through finite element modeling and experimental validation that an appropriate thermo mechanical design is necessary to achieve mechanically reliable circuits and thermally optimized packages.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117134631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I. Belov, M. Lindgren, J. Ryden, Zahra Alavizadeh, P. Leisner
{"title":"CFD assisted design evaluation and experimental verification of a logic controlled local PCB heater for humidity management in electronics enclosure","authors":"I. Belov, M. Lindgren, J. Ryden, Zahra Alavizadeh, P. Leisner","doi":"10.1109/ESIME.2010.5464561","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464561","url":null,"abstract":"Humidity management of commercial-of-the-shelf electronic components in non-controlled climatic environments can be realized e.g. by introducing a local printed circuit board heater. By choosing appropriate size and location of the heater plate in the vicinity of the critical electronic packages, and utilizing logic control function, it is possible to improve the quality of local humidity management and reduce power consumption of the heater, which is important especially in case of battery driven portable or vehicle mounted devices. A computational fluid dynamics assisted methodology has been developed to determine the best feasible design of the heater, followed by experimental verification of the constructed logic controlled heater. The experiment has been performed in a harsh climatic environment including temperature variation from +33°C to +40°C, and relative humidity variation from 54% to 80%. Analysis of the experimental %RH and temperature curves as well as power profile of the heater has confirmed the feasibility of the chosen approach to maintain greater than 9°C difference between the electronics package surface temperature and the local dew point temperature, by applying discrete power pulses with the amplitude less than 6 W.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126114194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"BGA lifetime prediction in JEDEC drop tests accounting for copper trace routing effects","authors":"F. Kraemer, S. Wiese, S. Rzepka, J. Lienig","doi":"10.1109/ESIME.2010.5464560","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464560","url":null,"abstract":"Experimental drop test results of 2nd-level assemblies can be influenced by numerous impact factors. The explicit definition of drop testing conditions by the JEDEC standard JESD22-B111 was intended to create a highly repeatable, and thus comparable, experimental setup. Recent developments showed, however, shifting failure modes from component to PCB side.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115559205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling the effects of the PCB motion on the response of microstructures under mechanical shock","authors":"A. Ramini, M. Younis, R. Miles","doi":"10.1109/ESIME.2010.5464602","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464602","url":null,"abstract":"Microelectomechanical systems (MEMS) are often used in portable electronic products that can be subjected to mechanical shock or impact due to being dropped accidentally. This work presents a modeling and simulation effort to investigate the effect of the vibration of a printed circuit board (PCB) on the dynamics of MEMS microstructures when subjected to shock. Two models are presented. In the first approach, the PCB is modeled as an Euler-Bernoulli beam to which a lumped model of a MEMS device is attached. In the second approach, a special case of a cantilever microbeam is modeled as a distributed-parameter system, which is attached to the PCB. These lumped-distributed and distributed-distributed models are solved numerically by integration of the equation of motion over time using the Galerkin procedure. Results of the two models are compared against each other for the case of a cantilever microbeam and also compared to the predictions of a finite-element model using ANSYS. The influence of the higher order vibration modes of the PCB, the location of the MEMS device on the PCB, the electrostatic forces, damping, and shock pulse duration are presented. It is found that neglecting the effects of the higher order modes of the PCB and the location of the MEMS device can cause incorrect predictions of the response of the microstructure and may lead to failure of the MEMS device. It is observed from the results that in some cases, depending on the different parameters of the problem, the response of the microstructure can be amplified causing early dynamic pull-in and hence possibly failure of the device.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122062920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Antonios, N. Ginot, C. Batard, Y. Scudeller, M. Machmoum
{"title":"Electro-thermal investigations on silicon inverters operating at low frequency","authors":"J. Antonios, N. Ginot, C. Batard, Y. Scudeller, M. Machmoum","doi":"10.1109/ESIME.2010.5464511","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464511","url":null,"abstract":"This paper presents methods for determining power loss profiles of Si-IGBT-based inverters and the induced junction temperature. Power losses were decomposed into different waveforms in order to investigate their influence on the junction temperature of the IGBT. Junction temperature has been determined by a dynamic thermal model using the transmission matrix technique.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121212207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. Meinshausen, K. Weide-Zaage, H. Frémont, W. Feng
{"title":"Virtual prototyping of PoP interconnections regarding electrically activated mechanisms","authors":"L. Meinshausen, K. Weide-Zaage, H. Frémont, W. Feng","doi":"10.1109/ESIME.2010.5464618","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464618","url":null,"abstract":"The technology is standing evolving. As a consequence, the stress the electronic components are submitted to are aggravated; at package and assembly levels, one has to face the densification of internal interconnections (SiP), the juxtaposition of RF, analogue, digital and power blocks and the processes are more aggressive do to the 3rd dimension like in PoP for instance. Reliability issues increase, as for instance thermal gradients or current densities are higher. So the reliability has to be taken into account at the design phase, and virtual prototyping is a good way. In this work reliability tests on bump chains and finite element simulations with 3-dimensional PoP models were carried out. Very good agreement was found between simulations and calculations of the mass flux divergence values due to electromigration and measurements und thermal loads concerning the failure sites. The maximum current crowding and electromigration mass flux was found in the via-in-pad of the bottom bumps.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116364921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Rhayem, A. Vrbický, R. Blečić, P. Malena, S. Bychikhin, D. Pogany, A. Wieers, A. Barić, M. Tack
{"title":"New methodology on electro-thermal characterization and modeling of large power drivers using lateral PNP BJTs","authors":"J. Rhayem, A. Vrbický, R. Blečić, P. Malena, S. Bychikhin, D. Pogany, A. Wieers, A. Barić, M. Tack","doi":"10.1109/ESIME.2010.5464596","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464596","url":null,"abstract":"This paper presents a new methodology to characterize and simulate the electro-thermal aspects of packaged power drivers using lateral bipolars. Maximum elevation of junction temperature due to the electrical power stress is sensed in the field of the drivers. Those measurements are further complemented by the transient interferometric mapping (TIM) inspection. For the first time a data driven segmented electro-thermal model is proposed to describe accurately the non-uniform current density and the thermal profile behavior of a large power driver.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124292813","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thermo-mechanical challenges in the longevity of micro-electronics","authors":"A. Gielen","doi":"10.1109/ESIME.2010.5464507","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464507","url":null,"abstract":"Automotive electronics, solid-state-lighting, and solar cells need have to operate under harsh circumstances, either by the kind of environment they operate in, such as automotive electronics under the hood, or by the long durations of exposure. In both cases traditional lifetime assessment methods are failing: The accelaration factors, who are key to accelerated lifetime testing, are becoming to small as the operational conditions are nearing the testing conditions (automotive electronics under the hood) or are insuffiently large to obtain acceptable testing times (SSL and Solar). Trends and drivers for this are described. The some fundamental issues are presented for the mission profiles, failure and degradation mechanisms, as well as the acceleration factors. Ideas to overcome the presented limitations are shown in a combined testing-modelling scheme with some examples highlighting aspects of these ideas.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121929906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multiple Environment Overstress Testing and modelling of solar cells","authors":"E. Veninga, A. Gielen","doi":"10.1109/ESIME.2010.5464524","DOIUrl":"https://doi.org/10.1109/ESIME.2010.5464524","url":null,"abstract":"Solar modules are typically qualified by conducting a sequence of industry standard tests, for example IEC 61215 and 61646. Although these tests are thorough and therefore also time consuming, the results cannot be used to determine the lifetime or make inferences about lifetime of the modules [1]. New approaches are needed to fulfil requirements as designed lifetime - typically 25 years - and time-to-market reduction. To this end we have developed a novel approach that is based on both physical testing and finite element modelling (figure 1) to increase the understanding of how parts fail and how to improve designs. Physical and numerical experiments are used in a combined way appreciating the strengths and weaknesses of both.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129988348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}