{"title":"JEDEC跌落试验中考虑铜迹路由效应的BGA寿命预测","authors":"F. Kraemer, S. Wiese, S. Rzepka, J. Lienig","doi":"10.1109/ESIME.2010.5464560","DOIUrl":null,"url":null,"abstract":"Experimental drop test results of 2nd-level assemblies can be influenced by numerous impact factors. The explicit definition of drop testing conditions by the JEDEC standard JESD22-B111 was intended to create a highly repeatable, and thus comparable, experimental setup. Recent developments showed, however, shifting failure modes from component to PCB side.","PeriodicalId":152004,"journal":{"name":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"BGA lifetime prediction in JEDEC drop tests accounting for copper trace routing effects\",\"authors\":\"F. Kraemer, S. Wiese, S. Rzepka, J. Lienig\",\"doi\":\"10.1109/ESIME.2010.5464560\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Experimental drop test results of 2nd-level assemblies can be influenced by numerous impact factors. The explicit definition of drop testing conditions by the JEDEC standard JESD22-B111 was intended to create a highly repeatable, and thus comparable, experimental setup. Recent developments showed, however, shifting failure modes from component to PCB side.\",\"PeriodicalId\":152004,\"journal\":{\"name\":\"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESIME.2010.5464560\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 11th International Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESIME.2010.5464560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
BGA lifetime prediction in JEDEC drop tests accounting for copper trace routing effects
Experimental drop test results of 2nd-level assemblies can be influenced by numerous impact factors. The explicit definition of drop testing conditions by the JEDEC standard JESD22-B111 was intended to create a highly repeatable, and thus comparable, experimental setup. Recent developments showed, however, shifting failure modes from component to PCB side.