2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)最新文献_第6页

Non-contact Aero-dynamic leadframe Stabling device applied in IC plating system 应用于IC电镀系统的非接触式气动引线架稳定装置

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507859

Wang Yue, G. Long, Zhang Jingyuan, Shao Peng

{"title":"Non-contact Aero-dynamic leadframe Stabling device applied in IC plating system","authors":"Wang Yue, G. Long, Zhang Jingyuan, Shao Peng","doi":"10.1109/IEMT.2008.5507859","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507859","url":null,"abstract":"This paper describes a new aero-dynamical lead-frame Stabling & drying device (called Aero-dynamic Air Knife) developed by Leshan-Phoenix Semiconductor Co. Ltd. (LPS) and Local company. This device is integrated into the traditional strip to strip belt plating system for preventing thinner or flimsy leadframe from damaging and jamming, especially in the air knife station. The traditional air knife is using compressed air to directly blow & dry/clean the strips before moving to next process, but it will cause air turbulent due to unbalance of air blow from both-sides, which results in leadframe swing in the process cell, or jamming and damage, especially for the thinner and wider leadframe. The new designed aerodynamic Leadfram Stabling Device is based on aerodynamic theory and air amplifier concept to establish a high speed stable air stream field passing through the strip surface to stabilize the leadframe within a small range of the balanced centering position of process cells and get more effective to dry and clean strips with the strong air-blow. It ensures the leadframe to be self-centered & transferred through process cells smoothly without any mechanical contact. This design not only dries the strip from water and chemical solution, but also prevents strips deformation, jamming and drops from hitting mechanical parts. It's helpful to reduce the consumption of plating process chemical, DI water & compressed air supply and save water treatment cost. The result shows this new designed non-contact leadframe Stabling Device is applicable in plating process and proven to be most effective with more than 70 mm width and less than 0.11 mm thickness high-density leadframe. The innovation of Non-contact leadframe stabling & drying air knife got National Patent of China, Patent No# ZL2007 2 008 232.8.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129936445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effective Electrostatic Discharge detection in equipment via EMI 利用电磁干扰对设备静电放电进行有效检测

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507819

Chia-Li Song, Yeoh Teong-San

引用次数: 3

Wire strength of Cu wire on al metallization after high temperature reliability 铜丝强度对铝金属化后高温的可靠性

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507847

Law Chee Soon, V. Krishna

引用次数: 3

Application of artificial neural network in thermal and solder joint reliability analysis for stacked dies LBGA 人工神经网络在叠模LBGA热可靠性和焊点可靠性分析中的应用

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507805

R. C. Law, I. Azid

{"title":"Application of artificial neural network in thermal and solder joint reliability analysis for stacked dies LBGA","authors":"R. C. Law, I. Azid","doi":"10.1109/IEMT.2008.5507805","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507805","url":null,"abstract":"Thermal analysis and solder joint reliability (SJR) analysis in electronic is very crucial during the design stage. Finite element method (FEM) becomes popular in predicting the thermal and SJR performance of electronic packaging due to expensive and laborious experiment setup. However, FEM involves complex theory of physic and mathematic modeling with tedious material properties, meshing and boundary condition setup which required experts and long computational time. Artificial neural network (ANN) is an alternative tool to predict thermal and SJR performance of electronic packages if the historical data for training is available. The trained ANN is user friendly, fast and accurate tool to predict the thermal and SJR performance of electronic packages during the design stage. This paper will discuss about FEM procedure which is used to produce training data for ANN. The packages used in the study are LBGA stacked dies which gaining popularity in recent years due to the enabling of integration of multiple system and subsystem into one package. The results of thermal and SJR analysis which were predicted ANN agreed well with the FEM result and data from publications.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121142319","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Characterization of mold compound to improve delamination performance in power package 提高电源封装分层性能的模具复合材料的表征

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507841

V. Ramalingam, A. Aripin, Sariman Tasmin, Y. S. Won

{"title":"Characterization of mold compound to improve delamination performance in power package","authors":"V. Ramalingam, A. Aripin, Sariman Tasmin, Y. S. Won","doi":"10.1109/IEMT.2008.5507841","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507841","url":null,"abstract":"This paper elaborately discusses the process of selecting the most prominent mold compound candidate which balanced the quality, cost and moldability aspects. In this experiment sample X7 was selected based on the validation performed. The mold compound fluidity properties and critical molding parameters' window were analyzed by measuring Visual mechanical rejects, weight gain (%) and SAT on nickel plated lead tip as output response. In the experiment conducted, transfer time and spiral flow were identified as significant factors affecting weight gain and delamination on nickel plated post. In order to ensure all related stress to die is below the limit of 30ksi, Finite Element Modeling and simulation were performed to study die thermal stresses when it is loaded with temperature excursion during package assembly steps assuming the packaging raw materials has not been pre-stressed by its manufacturing process such as when the leadframe undergo stamping, die saw and etc. The analysis recommends the use of mold compound X7 for its superior performance at reflow condition. Before the mold compound could be released into production mode, mold runners were redesigned by modifying the draft angle at `weak point' and ejector pin were slotted-in on cull surface to allow uniformed ejection force. It reports the successful introduction of delamination improved mold compound which complies to MSL-1 260C package robustness.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"228 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122981535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Achieving full fungibility and Quick Changeover by turning knobs in tape and Reel machine by applying SMED theory 应用SMED理论，实现带卷机旋钮的完全可替换性和快速转换

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507808

Supramaniam Tharisheneprem

{"title":"Achieving full fungibility and Quick Changeover by turning knobs in tape and Reel machine by applying SMED theory","authors":"Supramaniam Tharisheneprem","doi":"10.1109/IEMT.2008.5507808","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507808","url":null,"abstract":"In semiconductor industry high volume manufacturing, on time customer delivery is given priority. On time delivery leads to major usage of SMED or Quick Changeover. Single Minute Exchange of Die (SMED) is one of the many lean production methods for reducing waste in a manufacturing process. It provides a rapid and efficient way of converting a manufacturing process from running the current product to running the next product. It is also often referred to as Quick Changeover (QCO). Performing faster change-over is important in manufacturing, or any process, because they make low cost flexible operations possible. SMED and quick changeover programs have many benefits for manufacturers. Single minute does not mean that all changeovers and startups should take only one minute, but that they should take less than 10 minutes (\"single digit minute\"). In Intel Penang Factory operations, PLCC Tape and Reel machine is one of the bottleneck on the packing operations for Network Communication products. SMED concept was applied on the PLCC Tape and Reel machines by using semi-automated system which operates with 12 simple to-operate-knobs. The conversion time was successfully improved from 84 minutes to <; 1 minute conversion with perfect alignment.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123125051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Solder void reduction on solder die attach for SIP-LGA 减少SIP-LGA焊锡模具上的焊锡空隙

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507790

H. Ming, L. Khor

{"title":"Solder void reduction on solder die attach for SIP-LGA","authors":"H. Ming, L. Khor","doi":"10.1109/IEMT.2008.5507790","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507790","url":null,"abstract":"SIP or System In Package as its name suggests is a package that consist of a combination of dies (asics, memory, mosfets etc), passive components or shielding in an IC package format. Due to design and layout complexity, it is normally required to be housed in a substrate based packaging. The connection of silicon die to package can be in the form of wire-bond, flipchip, epoxy die attach,or solder die attach. In cases where solder die attach is used, the challenge would lie in the ability to produce the least die attach void. The presence of solder void underneath the die is not desirable as it has thermal and in some cases electrical impact in the performance of the device. Solder voids, depending on its magnitude can also reduce the reliability and functionality of the device. There are many methods of applying solder namely using solder preform . dispensing solder paste or screen printing solder paste. Screen printing is the most desirable process due to its uph and ability in controlling the solder volume. This paper discusses in detail some of the factors that affect the solder voids percentage and look into ways to improve the amount of solder void underneath a die by 50%.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132490591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Variability modeling of RF characteristics for multi-finger MOSFETs using statistical methods 基于统计方法的多指mosfet射频特性变异性建模

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507890

Hyuck-Sang Yim, J. Kang, I. Yun

引用次数: 2

Screen and stencil printing processes for wafer backside coating 晶圆片背面涂布的网版和网版印刷工艺

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507863

M. Whitmore, J. Schake

{"title":"Screen and stencil printing processes for wafer backside coating","authors":"M. Whitmore, J. Schake","doi":"10.1109/IEMT.2008.5507863","DOIUrl":"https://doi.org/10.1109/IEMT.2008.5507863","url":null,"abstract":"Stencil printing equipment has traditionally been used in the surface mount assembly industry for solder paste printing. In recent years the flexibility of the tool has been exploited for a wide range of materials and processes to aid semiconductor packaging and assembly. One such application has been the deposition of adhesive coatings onto the backside of silicon wafers. This paper looks at the application of two totally different epoxy materials to the non active side of silicon wafers one providing a B-stageble die attach layer and one providing a protective laser-markable cover layer aimed at protecting individual die from damage during dicing. Printing trials, with the two commercially standard, non-conductive epoxy based materials were conducted. For each material, 24 200mm wafers were printed. Both screen and stencil printing processes were compared for each material. Effects of printing process parameters were also considered. Coating thickness planarity across a wafer is the key metric for a successful coating process. For each wafer processed a minimum of 16 thickness measurements were made. Results showing thickness control capability are presented. The study demonstrates that coating co-planarity accomplishing ±12.5μm @ 6 sigma control with cured thickness's down to 30μm is possible.","PeriodicalId":151085,"journal":{"name":"2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122612758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

iNEMI BFR-free PCB materials evaluation project report iNEMI无bfr PCB材料评估项目报告

2008 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT) Pub Date : 2008-11-01 DOI: 10.1109/IEMT.2008.5507787

S. Tisdale, G. B. Long, R. Krabbenhoft, K. Papathomas, Terry Fischer, H. Fu

引用次数: 1