{"title":"New sensor concept for intra-frame scene and speed capturing","authors":"Máté Németh, Á. Zarándy","doi":"10.1109/ECCTD.2015.7300118","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300118","url":null,"abstract":"Deployment of automated traffic surveillance systems play an important role in traffic law enforcement. Existing devices use RADAR or LIDAR technologies for speed measurement, as well as cameras for license plate recognition. It would be profitable to replace those relatively expensive active systems with a single camera for both tasks. An optical based vehicle speed measurement method is presented in this paper. The proposed method calculates speed estimates based on a single, superimposed frame, which contains information of the movement of certain objects during exposure, and can be obtained through modified shutter control. An applicable sensor structure and exposure-control are also shown, as well as some experimental results.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133293760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mehri Teimoory, A. Amirsoleimani, A. Ahmadi, S. Alirezaee, Saeideh Salimpour, M. Ahmadi
{"title":"Memristor-based linear feedback shift register based on material implication logic","authors":"Mehri Teimoory, A. Amirsoleimani, A. Ahmadi, S. Alirezaee, Saeideh Salimpour, M. Ahmadi","doi":"10.1109/ECCTD.2015.7300100","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300100","url":null,"abstract":"Memristor as an emerging history dependent nanometer scaled element will play an important role in future nanoelectronic computing technologies. Some pure and hybrid memristor-based implementation techniques have been proposed in recent years. Material implication logic is one of the significant areas for memristor-based logic implementation. In this paper a memristor-based linear feedback shift register is implemented based on material implication logic. It is implemented by 8 memristors which is considerably used less area in comparison with conventional CMOS-based peers. Also the proposed memristor-based LFSR circuit needs 55 computational steps for generating a 4-bits number.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"35 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120889378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. B. Basyurt, E. Bonizzoni, F. Maloberti, D. Y. Aksin
{"title":"Design of an op-amp free voltage reference with PWM regulation","authors":"P. B. Basyurt, E. Bonizzoni, F. Maloberti, D. Y. Aksin","doi":"10.1109/ECCTD.2015.7300083","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300083","url":null,"abstract":"This paper presents the design of an op-amp free voltage reference generator which utilizes a pulse width regulated loop. The proposed voltage reference circuit has been designed and simulated in a standard 0.18-μm CMOS technology. Post layout simulation results show that it is capable of operating with supply voltages down to 0.7 V while generating an output voltage of 202 mV. The achieved temperature coefficient is 54 ppm/°C for temperatures ranging from 0 to 100 °C. The simulated power consumption at the room temperature is 400 nW.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132889752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zdeněk Biolek, D. Biolek, V. Biolková, Z. Kolka, A. Ascoli, R. Tetzlaff
{"title":"Generalized rule of homothety of ideal memristors and their siblings","authors":"Zdeněk Biolek, D. Biolek, V. Biolková, Z. Kolka, A. Ascoli, R. Tetzlaff","doi":"10.1109/ECCTD.2015.7300084","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300084","url":null,"abstract":"The pinched hysteresis loop area increasing with the square of the frequency of driving harmonic signal on the assumption of constant charge delivered within the half-period belongs to the less known fingerprints of ideal memristor. The paper proves that this fingerprint holds not only for the harmonic excitation: the v-i characteristic of a memristor driven by n-times accelerated and simultaneously n-times amplified signal of arbitrary waveform is a homothetic entity with respect to the original characteristic, with the homothetic center at the v-i origin and with the homothety ratio n. This rule holds for an arbitrary ideal memristor but not for an arbitrary general memristive element. Breaking this rule indicates reliably that the element analyzed is not an ideal memristor.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123365563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Remarks on the Adler's equation","authors":"A. Buonomo, A. L. Schiavo","doi":"10.1109/ECCTD.2015.7300098","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300098","url":null,"abstract":"The phase equation of oscillators driven by weak signals at a frequency multiple of the free-running oscillation frequency is studied. This equation, describing the behavior of many injection locked circuits, extends the applicability of the well-known Adler's equation, which is limited to forcing signals close to the free-running frequency. The exact solution of the phase equation in time domain is derived for pulling operation and its utility in the calculation of the frequency spectrum of the system response is shown with reference to a widely used divide-by-2 frequency divider. Finally, a comparison of the results obtained by presented formulas with the results obtained by numerical integration and by SPICE simulations based on BSIM3 models is presented.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"39 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120912694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Statistical analysis of static noise margins","authors":"Valeriu Beiu, M. Tache","doi":"10.1109/ECCTD.2015.7300090","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300090","url":null,"abstract":"This paper presents preliminary results of a statistical analysis of the SNM of inverters (as the basic element of any SRAM bit cell). Results are statistical meaningful as probabilities are calculated accurately, and should lead to more precise, faster, and better yield estimates. Comparisons with Monte Carlo simulations are supporting such claims.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124327151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Goossens, Martijn Koedam, Shubhendu Sinha, Andrew Nelson, M. Geilen
{"title":"Run-time middleware to support real-time system scenarios","authors":"K. Goossens, Martijn Koedam, Shubhendu Sinha, Andrew Nelson, M. Geilen","doi":"10.1109/ECCTD.2015.7300069","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300069","url":null,"abstract":"Systems on Chip (SOC) are powerful multiprocessor systems capable of running multiple independent applications, often with both real-time and non-real-time requirements. Scenarios exist at two levels: first, combinations of independent applications, and second, different states of a single application. Scenarios are dynamic since applications can be started and stopped independently, and a single application's behaviour can depend on its inputs, on different stages in processing, and so on. In this paper we describe how the CompSOC platform offers system integrators and application writers the capability to implement multiple scenarios.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126155502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mesut Atasoyu, H. Kuntman, B. Metin, N. Herencsar, O. Cicekoglu
{"title":"Design of current-mode class 1 frequency-agile filter employing CDTAs","authors":"Mesut Atasoyu, H. Kuntman, B. Metin, N. Herencsar, O. Cicekoglu","doi":"10.1109/ECCTD.2015.7300066","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300066","url":null,"abstract":"In this study, in order to demonstrate the versatility of the active building block so-called current differencing transconductance amplifier (CDTA), a current-mode (CM) frequency-agile filter (FAF) application circuit is designed. The derived 2nd-order class 1 CM FAF employs three CDTAs, two capacitors and a single resistor. A layout is designed for CDTA and post-layout simulations are performed using CADENCE Spectre tool with TSMC 0.18 μm level-49 CMOS technology process and BSIM3v3 parameters. The simulation results confirm theoretical findings.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134057457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Franck Courbon, Philippe Loubet-Moundi, J. Fournier, A. Tria
{"title":"SEMBA: A SEM based acquisition technique for fast invasive Hardware Trojan detection","authors":"Franck Courbon, Philippe Loubet-Moundi, J. Fournier, A. Tria","doi":"10.1109/ECCTD.2015.7300097","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300097","url":null,"abstract":"In this paper, we present how SEMBA, a fast invasive technique for white team Hardware Trojan detection, has been used to differentiate between a maliciously infected integrated circuit and a genuine one. Our methodology is based on the observation of the component's hardware structure and includes the use of wet etching, Scanning Electron Microscopy and Multiple Image Alignment. Once the Integrated Circuits' image have been fully reconstructed, image processing allows to detect the presence of the Hardware Trojan (HT). SEMBA is a fully automated approach with a 100% success rate, detecting any `transistor-size' HTs and requiring `affordable' resources and time.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124232836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Inverter-based Low-power, low-noise SC-VGA and 8 channel pipelined S/H analog beamformer for ultrasound imaging probes","authors":"P. Wang, T. Ytterdal","doi":"10.1109/ECCTD.2015.7300112","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300112","url":null,"abstract":"This paper presents an inverter-based low-power low-noise switched-capacitor variable gain amplifier (SC-VGA), and an 8-channel sample-and-hold (S/H) analog beamformer (ABF) for 2-6 MHz second harmonic cardiac ultrasound imaging probes. The sampling frequency is 40 MHz in both the SC-VGA and the ABF. The SC-VGA has 8-bit gain control and achieves the dB-in-linear gain range from -14 dB to 32 dB. To suppress the second harmonic distortion (HD2), the SC-VGA completes the single-ended to differential conversion. By using a 2D piezoelectric transducer (PZT) model as the signal source, the SC-VGA performs the signal-to-noise ratio (SNR) of 45.4 dB, HD2 of -50 dB at the output swing of 820 mVpp, and power consumption of 214 μW at a supply voltage of 0.9 V. An 8-channel pipelined S/H ABF based on the SC analog memory following the SC-VGAs can improve the SNR to 54 dB and the HD2 to -54.3 dB. Each channel in the ABF consists of eight SC analog memories, and the total delay is up to 200 ns with the resolution of 25 ns. The summation amplifier in the ABF is an inverter-based differential SC amplifier, and its power consumption is 228 μW at a 0.9 V supply voltage. The simulation is based on 0.18 μm CMOS technology.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131460598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}