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Pixel interlacing to trade off the resolution of a cellular processor array against more registers 像素隔行，以权衡蜂窝处理器阵列的分辨率与更多的寄存器
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300011
Julien N. P. Martel, M. Chau, Matthew Cook, P. Dudek
{"title":"Pixel interlacing to trade off the resolution of a cellular processor array against more registers","authors":"Julien N. P. Martel, M. Chau, Matthew Cook, P. Dudek","doi":"10.1109/ECCTD.2015.7300011","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300011","url":null,"abstract":"Recently, several low and mid-level vision algorithms have been successfully demonstrated at high-frame rate on a low power-budget using compact programmable CPA (Cellular Processor Arrays) vision-chips that embed a Processing Element (PE) at each pixel. Because of the inherent constraint in the VLSI design of these devices, algorithms they run are limited to scarce resources, in particular memory - that is the number of registers available per pixel. In this work, we propose an algorithmic procedure to trade off the pixel resolution of a programmable CPA vision-chip against the number of its registers. By grouping pixels into “super-pixels” where pixel registers are interlaced, we virtually expose more registers in software allowing to run more sophisticated algorithms. We implement and demonstrate on an actual device an algorithm that could not have been executed on an existing CPA at full resolution due to its memory requirements.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115707309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Transfer characteristics and bandwidth limitation in a linear-drift memristor model 线性漂移忆阻器模型的传输特性和带宽限制
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300037
Joakim Alvbrant, V. Keshmiri, J. wikner
{"title":"Transfer characteristics and bandwidth limitation in a linear-drift memristor model","authors":"Joakim Alvbrant, V. Keshmiri, J. wikner","doi":"10.1109/ECCTD.2015.7300037","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300037","url":null,"abstract":"The linear-drift memristor model, suggested by HP Labs a few years ago, is used in this work together with two window functions. From the equations describing the memristor model, the transfer characteristics of a memristor is formulated and analyzed. A first-order estimation of the cut-off frequency is shown, that illustrates the bandwidth limitation of the memristor and how it varies with some of its physical parameters. The design space is elaborated upon and it is shown that the state speed, the variation of the doped and undoped regions of the memristor, is inversely proportional to the physical length, and depth of the device. The transfer characteristics is simulated for Joglekar-Wolf, and Biolek window functions and the results are analyzed. The Joglekar-Wolf window function causes a distinct behavior in the tranfer characteristics at cut-off frequency. The Biolek window function on the other hand gives a smooth state transfer function, at the cost of loosing the one-to-one mapping between charge and state. We also elaborate on the design constraints derived from the transfer characteristics.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115766149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Memristive crossbar design and test in non-adaptive proactive reconfiguring scheme 非自适应主动重配置方案的忆阻横条设计与测试
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300125
P. Pouyan, E. Amat, A. Rubio
{"title":"Memristive crossbar design and test in non-adaptive proactive reconfiguring scheme","authors":"P. Pouyan, E. Amat, A. Rubio","doi":"10.1109/ECCTD.2015.7300125","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300125","url":null,"abstract":"One of the most promising emerging technologies is based on the use of memristive devices. Although capable of implementing certain type of logic circuits, they are being extensively used for memory applications. Beside memristor advantages such as high scalability, their drawbacks including manufacturing process variability and limited read/write endurance, could risk their future utilization. In this work we propose an implementation of a proactive reconfiguration strategy alongside a testing procedure to detect the weakest memory cells inside the crossbar. Such a realization can extend the crossbar lifetime with spare components and avoid memory cell failures.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122768509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Motion correction of thermographic images in neurosurgery 神经外科热成像图像的运动校正
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300009
V. Senger, R. Tetzlaff, Jens Müller, Nico Hoffmann, Julia Hollmach, C. Schnabel, Yordan Radev, M. Kirsch, U. Petersohn, G. Steiner, E. Koch
{"title":"Motion correction of thermographic images in neurosurgery","authors":"V. Senger, R. Tetzlaff, Jens Müller, Nico Hoffmann, Julia Hollmach, C. Schnabel, Yordan Radev, M. Kirsch, U. Petersohn, G. Steiner, E. Koch","doi":"10.1109/ECCTD.2015.7300009","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300009","url":null,"abstract":"Neurosurgery relies strongly on medical imaging techniques. However, many state-of-the-art diagnostic tools such as computer tomography (CT) and magneto-resonance imaging (MRI) cannot be applied during ongoing surgery in general. Our aim is to realize a multi-purpose imaging platform capable of real-time assistance to the surgeon. Therefore, we apply thermography: a non-invasive, contactless, marker-free technique that has been used in various medical applications, albeit some challenges remain. In this paper, we propose a Cellular Nonlinear Network-based image pre-processing for feature enhancing and extraction followed by a cepstrum-based motion correction algorithm allowing a real-time removal of breathing artifacts from thermographic images.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130579032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A run-time self-adaptive resource allocation framework for MPSoC systems 一种运行时自适应MPSoC系统资源分配框架
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300074
W. Quan, A. Pimentel
{"title":"A run-time self-adaptive resource allocation framework for MPSoC systems","authors":"W. Quan, A. Pimentel","doi":"10.1109/ECCTD.2015.7300074","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300074","url":null,"abstract":"Self-adaptivity is becoming a key feature of modern embedded systems to meet performance and power constraints in increasingly common situations where embedded application workloads show highly dynamic behavior. This paper presents a scalable framework for adaptive MultiProcessor System-on-Chip (MPSoC) systems that allows for adaptivity throttling.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125248170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A digitally corrected bandgap voltage reference with a 3σ temperature coefficient of 3.8 ppm/K 3σ温度系数为3.8 ppm/K的数字校正带隙基准电压
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300113
Hannes Badertscher, Armin Stocklin, Roman Willi, Andreas Fitzi, P. Zbinden
{"title":"A digitally corrected bandgap voltage reference with a 3σ temperature coefficient of 3.8 ppm/K","authors":"Hannes Badertscher, Armin Stocklin, Roman Willi, Andreas Fitzi, P. Zbinden","doi":"10.1109/ECCTD.2015.7300113","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300113","url":null,"abstract":"Bangap voltage references (BGRs) are widely used in today's circuits as references with a low temperature coefficient. Especially measurement circuits and metering applications demand a very low temperature coefficient to maintain the desired precision over the entire temperature range. Today's BGR designs use analog circuits to correct for the effects which lead to a temperature drift. In this paper a bandgap reference voltage which uses a digital correction technique is presented. The proposed design includes a temperature sensor to measure the current chip temperature and a bandgap reference which is controllable by a 3-bit digital input. The input to the bandgap block is calculated using a digital correction algorithm. The proposed design was implemented in a 0.35 μm CMOS process and occupies 0.437 mm2. After calibration, a 3σ temperature coefficient of 3.8 ppm/K is achieved over a temperature range from -40°C to 100 °C. With the proposed design, high performance measurements over a large temperature range have become possible. The digital design allows for an easy adaptation to various needs and temperature coefficients.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127902293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Effective (Spur-Free) dithering of digital delta-sigma modulators with pseudorandom dither 伪随机抖动数字δ - σ调制器的有效(无杂散)抖动
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-19 DOI: 10.1109/ECCTD.2015.7300106
Hongjia Mo, Michael Peter Kennedy
{"title":"Effective (Spur-Free) dithering of digital delta-sigma modulators with pseudorandom dither","authors":"Hongjia Mo, Michael Peter Kennedy","doi":"10.1109/ECCTD.2015.7300106","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300106","url":null,"abstract":"Digital delta-sigma modulators (DDSMs) are finite state machines; their spectra are characterized by strong periodic tones (so-called spurs) when they cycle repeatedly in time through a small number of states. This can happen for a range of constant and periodic inputs. Pseudorandom dither generators are widely used to break up periodic cycles in DDSMs in order to eliminate spurs produced by underlying periodic behavior. Unfortunately, pseudorandom dither signals are themselves periodic and therefore can produce spurs in the output spectrum. We call pseudorandom dithering effective if it breaks up periodic cycles in the modulator without producing its own spurs in the output spectrum. This paper presents rigorous mathematical analysis and a design methodology to achieve effective dithering.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126963054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Design of low-noise switched-capacitor low-pass filters with adaptive configuration 具有自适应配置的低噪声开关电容低通滤波器设计
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-16 DOI: 10.1109/ECCTD.2015.7300033
R. Nicodimus, T. Shima
{"title":"Design of low-noise switched-capacitor low-pass filters with adaptive configuration","authors":"R. Nicodimus, T. Shima","doi":"10.1109/ECCTD.2015.7300033","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300033","url":null,"abstract":"Noise and area consumption has been a tradeoff in circuit design. Especially for switched-capacitor filters (SCF), kT/C noise gives a limitation to the minimum value of unit capacitance. In case of SCFs with a large capacitance spread, this limitation will result in a large area consumption due to large capacitors. Charge scaling technique combined with correlated double sampling gives a solution to this problem [18]. However, due to a fixed topology, the conventional designs suffer from lower signal-to-noise ratio (SNR) with small input voltages. When capacitance reduction is less crucial, there is a room to improve the SNR. This paper proposes an SCF with adaptive configuration to improve the SNR at small input signals. The proposed technique can reduce the output noise voltage by 30% for small input signals.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127159498","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The synthesis of noise transfer functions for bandpass delta-sigma modulators with tunable center frequency 中心频率可调带通δ - σ调制器噪声传递函数的合成
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-16 DOI: 10.1109/ECCTD.2015.7300122
Enrico Roverato, M. Kosunen, J. Ryynänen
{"title":"The synthesis of noise transfer functions for bandpass delta-sigma modulators with tunable center frequency","authors":"Enrico Roverato, M. Kosunen, J. Ryynänen","doi":"10.1109/ECCTD.2015.7300122","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300122","url":null,"abstract":"This paper presents a method to synthesize the noise transfer function (NTF) for tunable bandpass delta-sigma modulators, where the quantization noise stopband can be programmed over the whole Nyquist range. Instead of relying on traditional filter design theory, the proposed method allows to create NTFs of arbitrary order by directly placing the zeros and poles on the z-plane. The advantage is that the NTF can be re-calculated for each center frequency by using simple closed form expressions, thus avoiding the need of large lookup tables to store multiple pre-computed coefficient sets. Extensive system-level simulations show that our method yields equal performance as the Chebyshev-II design method. As an example, the synthesis of a binary 12th-order tunable bandpass delta-sigma modulator is demonstrated, and its stability is proven for any choice of the center frequency.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116592028","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter 全数字锁相环在40纳米CMOS为5.8 Gbps串行链路发射机
2015 European Conference on Circuit Theory and Design (ECCTD) Pub Date : 2015-10-16 DOI: 10.1109/ECCTD.2015.7300035
Yury Antonov, T. Tikka, K. Stadius, J. Ryynänen
{"title":"All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter","authors":"Yury Antonov, T. Tikka, K. Stadius, J. Ryynänen","doi":"10.1109/ECCTD.2015.7300035","DOIUrl":"https://doi.org/10.1109/ECCTD.2015.7300035","url":null,"abstract":"This paper describes an all-digital phase-locked loop based clock generator for a MIPI M-PHY serial link transmitter. The paper focuses on ADPLL phase accumulator speed optimization, PVT calibration, loop type changing criteria and power saving in phase digitization process. The experimental circuit is implemented in 40 nm CMOS and generates the MIPI M-PHY defined frequencies from 1.2 GHz to 5.8 GHz.","PeriodicalId":148014,"journal":{"name":"2015 European Conference on Circuit Theory and Design (ECCTD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126731980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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