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Energy-aware packet and task co-scheduling for embedded systems 嵌入式系统的能量感知分组和任务协同调度
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879058
L. Santinelli, Mauro Marinoni, Francesco Prosperi, Francesco Esposito, Gianluca Franchino, G. Buttazzo
{"title":"Energy-aware packet and task co-scheduling for embedded systems","authors":"L. Santinelli, Mauro Marinoni, Francesco Prosperi, Francesco Esposito, Gianluca Franchino, G. Buttazzo","doi":"10.1145/1879021.1879058","DOIUrl":"https://doi.org/10.1145/1879021.1879058","url":null,"abstract":"A crucial objective in battery operated embedded systems is to work under the minimal power consumption that provides a desired level of performance. Dynamic Voltage Scaling (DVS) and Dynamic. Power Management (DPM) are typical techniques used on processors and devices to reduce the power consumption through speed variations and power switching, respectively. The effectivenes of both DVS and DPM needs to be considered in the development of a power management policy for a system that consists of both DVS-enabled and DPM-enabled components.\u0000 This paper explores how to efficiently reduce the power consumption of real-time applications with constrained resources, like energy, CPU, and transmission bandwidth. A combined DVS-DP approach with a reduced complexity is proposed to make use of online strategies for embedded systems. Simulation results reveal the effectiveness of the proposed approach.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"155 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124573197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A reliable MTD design for MLC flash-memory storage systems 一种可靠的MLC闪存存储系统MTD设计
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879045
Yuan-Hao Chang, Tei-Wei Kuo
{"title":"A reliable MTD design for MLC flash-memory storage systems","authors":"Yuan-Hao Chang, Tei-Wei Kuo","doi":"10.1145/1879021.1879045","DOIUrl":"https://doi.org/10.1145/1879021.1879045","url":null,"abstract":"The reliability of flash-memory chips has dropped dramatically in recent years. In order to solve this problem, a reliable memory technology device (MTD) design is proposed to address this concern at the device driver layer so as to release the design complexity of flash-memory management software/firmware and to improve the maintainability and portability of flash management designs for existing and future products. The proposed design was evaluated through a series of experiments based on realistic traces to show that the proposed approach could significantly improve the reliability of flash memory with limited overheads.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129479553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Using NAND flash memory for executing large volume real-time programs in automotive embedded systems 在汽车嵌入式系统中使用NAND闪存执行大容量实时程序
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879043
Kwang-won Cho, Kyoung-Soo We, Chang-Gun Lee, Kanghee Kim
{"title":"Using NAND flash memory for executing large volume real-time programs in automotive embedded systems","authors":"Kwang-won Cho, Kyoung-Soo We, Chang-Gun Lee, Kanghee Kim","doi":"10.1145/1879021.1879043","DOIUrl":"https://doi.org/10.1145/1879021.1879043","url":null,"abstract":"For advanced features of next generation vehicles, the real-time programs in automotive embedded systems are dramatically increasing. For such large volume program codes, this paper proposes a novel framework to use high-density and low-cost nonvolatile memory, i.e., NAND flash memory, as a low-cost mean of storing and executing hard real-time programs. Regarding this, one challenge is that NAND flash memory allows only 2KB page-based read operations not per-byte random access, which requires RAM as working storage for code executions. In order to minimize the expensive RAM requirements, the proposed framework optimally partitions the RAM for multiple hard real-time tasks and optimally determines the pinning/LRU combination for each RAM partition such that all task deadlines are deterministically guaranteed. The proposed framework is verified with the actual real-time programs for unmanned autonomous driving. To the best of our knowledge, this is the first work that allows us to use NAND flash memory for hard real-time program executions with the minimal usage of RAM.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130740301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
TeleScribe: a scalable, resumable wireless reprogramming approach TeleScribe:一种可扩展、可恢复的无线重编程方法
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879040
Min-Hua Chen, P. Chou
{"title":"TeleScribe: a scalable, resumable wireless reprogramming approach","authors":"Min-Hua Chen, P. Chou","doi":"10.1145/1879021.1879040","DOIUrl":"https://doi.org/10.1145/1879021.1879040","url":null,"abstract":"TeleScribe is a software mechanism for efficiently reprogramming embedded systems such as wireless sensor nodes over a shared communication link. One distinguishing feature is its ability to resume update on any node after power failure, link disconnection, or many other indefinite disruptive events. The nodes are guaranteed never to be left in a bad state as a result of such incomplete reprogramming procedures. Moreover, TeleScribe efficiently disseminates the binary image to as many nodes as possible, thereby minimizing redundant communication while ensuring that, in a later round as needed, all nodes receive packets that were lost earlier. Experimental results show TeleScribe to be the fastest and smallest among similar systems, achieving an update rate of about 95 bytes per node per second in a 100-node system. The total code size of our implementation on the node is around only 2 KB, making TeleScribe easily adaptable to a wide range of platforms with little overhead","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"33 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116342099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Power-aware temporal isolation with variable-bandwidth servers 可变带宽服务器的功耗感知临时隔离
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879056
Silviu S. Craciunas, C. Kirsch, A. Sokolova
{"title":"Power-aware temporal isolation with variable-bandwidth servers","authors":"Silviu S. Craciunas, C. Kirsch, A. Sokolova","doi":"10.1145/1879021.1879056","DOIUrl":"https://doi.org/10.1145/1879021.1879056","url":null,"abstract":"Variable-bandwidth servers (VBS) control process execution speed by allocating variable CPU bandwidth to processes. VBS enables temporal isolation of EDF-scheduled processes in the sense that the variance in CPU throughput and latency of each process is bounded independently of any other concurrently running processes. In this paper we aim at reducing CPU power consumption with VBS by CPU voltage and frequency scaling while maintaining temporal isolation. Scaling to lower frequencies is possible whenever there is CPU slack in the system. We first show that, in the presence of CPU slack, frequency scaling of EDF-scheduled, possibly non-periodic tasks (as they arise with VBS) is safe up to full CPU utilization and propose a frequency-scaling VBS algorithm that exploits CPU slack to minimize operating frequencies with maximal CPU utilization while maintaining temporal isolation. Additional power may be saved by redistributing computation time of individual processes while still maintaining temporal isolation if the system has knowledge of future events. We introduce an offline algorithm as an optimal baseline and an online algorithm that approximates the baseline. While the offline algorithm works for various, possibly complex power consumption models, the online algorithm may reduce power consumption only for a simplified power consumption model by reducing the CPU utilization jitter in the system.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122701226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Load-based schedulability analysis of certifiable mixed-criticality systems 可验证混合临界系统基于负荷的可调度性分析
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879035
Haohan Li, Sanjoy Baruah
{"title":"Load-based schedulability analysis of certifiable mixed-criticality systems","authors":"Haohan Li, Sanjoy Baruah","doi":"10.1145/1879021.1879035","DOIUrl":"https://doi.org/10.1145/1879021.1879035","url":null,"abstract":"Many safety-critical embedded systems are subject to certification requirements. However, only a subset of the functionality of the system may be safety-critical and hence subject to certification; the rest of the functionality is non safety-critical and does not need to be certified. Certification requirements in such mixed-criticality systems give rise to some interesting scheduling problems, that cannot be satisfactorily addressed using techniques from conventional scheduling theory. In prior work, we have proposed a priority-based algorithm for scheduling such mixed-criticality systems on preemptive uniprocessor platforms. In this paper, we derive a sufficient schedulability condition for efficiently determining whether a given mixed-criticality system can be successfully scheduled by this algorithm. We show that this algorithm (and the associated schedulability test) is strictly superior to prior algorithms that have been used for scheduling mixed-criticality systems needing certification.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"3 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120987680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
Janus-FTL: finding the optimal point on the spectrum between page and block mapping schemes Janus-FTL:在页面和块映射方案之间的频谱上找到最优点
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879044
Hunki Kwon, Eunsam Kim, Jongmoo Choi, Donghee Lee, S. Noh
{"title":"Janus-FTL: finding the optimal point on the spectrum between page and block mapping schemes","authors":"Hunki Kwon, Eunsam Kim, Jongmoo Choi, Donghee Lee, S. Noh","doi":"10.1145/1879021.1879044","DOIUrl":"https://doi.org/10.1145/1879021.1879044","url":null,"abstract":"NAND flash memory based storage such as SSDs is gaining popularity in commodity computer systems. Some low-end SSDs use the block mapping FTL (Flash Translation Layer) that is good for sequential write patterns but poor for random ones. On the other hand, high-end SSDs tend to use the page mapping FTL that is effective for random write patterns, but whose performance degrades after successive random writes. Designing an FTL that adapts to various workload patterns and provides long-term stable performance is a challenging issue. To resolve this issue, we propose a new FTL, which we call Janus-FTL, that provides a spectrum between the block and page mapping schemes. By adapting along the spectrum, Janus-FTL can provide long-term superior write performance for various workload patterns. We also present a cost model of Janus-FTL that shows the existence of the optimal point on the spectrum for a given workload. Our experimental results show the superiority of Janus-FTL, which adapts itself along the spectrum for a given workload, over state-of-the-art hybrid mapping FTLs and the pure page mapping FTL","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126047816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
Components, platforms and possibilities: towards generic automation for MDA 组件、平台和可能性:走向MDA的通用自动化
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879027
Ethan K. Jackson, Eunsuk Kang, M. Dahlweid, D. Seifert, T. Santen
{"title":"Components, platforms and possibilities: towards generic automation for MDA","authors":"Ethan K. Jackson, Eunsuk Kang, M. Dahlweid, D. Seifert, T. Santen","doi":"10.1145/1879021.1879027","DOIUrl":"https://doi.org/10.1145/1879021.1879027","url":null,"abstract":"Model-driven architecture (MDA) is a model-based approach for engineering complex software systems. MDA is particularly attractive for designing embedded systems because models can be easily evolved as hardware and software requirements evolve. However, efforts to apply MDA in industrial settings expose several open problems surrounding tooling: Engineers need automated techniques that are scalable, general, and extensible. In this paper we describe the formula framework as a novel approach towards general automation for MDA. We develop a running example and benchmarks to compare our tools with other state-of-theart approaches.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121652047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 72
A model based approach for debugging embedded systems in real-time 基于模型的嵌入式系统实时调试方法
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879031
Padma Iyenghar, C. Westerkamp, Juergen Wuebbelmann, E. Pulvermüller
{"title":"A model based approach for debugging embedded systems in real-time","authors":"Padma Iyenghar, C. Westerkamp, Juergen Wuebbelmann, E. Pulvermüller","doi":"10.1145/1879021.1879031","DOIUrl":"https://doi.org/10.1145/1879021.1879031","url":null,"abstract":"Model driven design and development of real-time embedded systems has been gaining a lot of attention in the recent past. It is imperative for a hard real-time embedded system to execute and respond to sequenced exchanges of messages under critical temporal constraints. The UML provides artifacts such as communication diagrams, sequence diagrams and timing diagrams to aid software engineers to model and precisely document such a schedule of interactions or state changes at the design level. While modeling at the design level is interesting on one hand, it is also significant to understand the run time behavior of the embedded software. A step forward in this direction is to provide a real-time representation of the target system behavior on the host side. We propose an approach to realize a target debugger on the host side with a monitor solution in the target side. With the back annotated information from the target, a visual representation of the system behavior in real-time is now available at the design level. This way, a debugging solution in real-time is provided, thus taking a step forward towards understanding the behavior of the embedded software at hand. We illustrate our proposed approach with a prototype and examples.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"9 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116788529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architectures 动态TDMA分布式体系结构上同步规范的语义保持实现
International Conference on Embedded Software Pub Date : 2010-10-24 DOI: 10.1145/1879021.1879048
D. Potop-Butucaru, Akramul Azim, S. Fischmeister
{"title":"Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architectures","authors":"D. Potop-Butucaru, Akramul Azim, S. Fischmeister","doi":"10.1145/1879021.1879048","DOIUrl":"https://doi.org/10.1145/1879021.1879048","url":null,"abstract":"We propose a technique to automatically synthesize programs and schedules for hard real-time distributed (embedded) systems from synchronous data-flow models. Our technique connects the SynDEx scheduling tool and the Network Code toolchain in a seamless flow of automatic model transformations that go all the way from specification to implementation.\u0000 Our contribution is the non-trivial connection between the models manipulated by SynDEx and by the Network Code toolchain, at both formal and tool level. We provide an algorithm for converting the data-dependent schedule tables output by SynDEx into Network Code programs which can be seen as an \"assembly code\" level for time-driven distributed real-time systems. The main difficulty is to ensure the preservation of both functionality and the real-time guarantees computed by SynDEx in the presence of clock drifts (which are abstracted away in the scheduling model of SynDEx). Existing tools can convert the resulting Network Code programs into software and hardware-accelerated execution units","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123548918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
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