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International Conference on Embedded Software最新文献

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Compositional deadlock detection for rendezvous communication 交会通信的组合死锁检测
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629344
Baolin Shao, N. Vasudevan, S. Edwards
{"title":"Compositional deadlock detection for rendezvous communication","authors":"Baolin Shao, N. Vasudevan, S. Edwards","doi":"10.1145/1629335.1629344","DOIUrl":"https://doi.org/10.1145/1629335.1629344","url":null,"abstract":"Concurrent programming languages are growing in importance with the advent of multi-core systems. However, concurrent programs suffer from problems, such as data races and deadlock, absent from sequential programs. Unfortunately, traditional race and deadlock detection techniques fail on both large programs and small programs with complex behaviors.\u0000 In this paper, we present a compositional deadlock detection technique for a concurrent language--SHIM--in which tasks run asynchronously and communicate using synchronous CSP-style rendezvous. Although SHIM guarantees the absence of data races, a SHIM program may still deadlock if the communication protocol is violated. Our previous work used NuSMV, a symbolic model checker, to detect deadlock in a SHIM program, but it did not scale well with the size of the problem. In this work, we take an incremental, divide-and-conquer approach to deadlock detection.\u0000 In practice, we find our procedure is faster and uses less memory than the existing technique, especially on large programs, making our algorithm a practical part of the compilation chain.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121067345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Serving embedded content via web applications: model, design and experimentation 通过web应用程序提供嵌入式内容:模型、设计和实验
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629352
S. Duquennoy, G. Grimaud, J. Vandewalle
{"title":"Serving embedded content via web applications: model, design and experimentation","authors":"S. Duquennoy, G. Grimaud, J. Vandewalle","doi":"10.1145/1629335.1629352","DOIUrl":"https://doi.org/10.1145/1629335.1629352","url":null,"abstract":"Embedded systems such as smart cards or sensors are now widespread, but are often closed systems, only accessed via dedicated terminals. A new trend consists in embedding Web servers in small devices, making both access and application development easier. In this paper, we propose a TCP performance model in the context of embedded Web servers, and we introduce a taxonomy of the contents possibly served by Web applications. The main idea of this paper is to adapt the communication stack behavior to application contents properties. We propose a strategies set fitting with each type of content. The model allows to evaluate the benefits of our strategies in terms of time and memory charge. By implementing a real use case on a smart card, we measure the benefits of our proposals and validate our model. Our prototype, called Smews, makes a gap with state of the art solutions both in terms of performance and memory charge.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117150233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Modular performance analysis of cyclic dataflow graphs 循环数据流图的模块化性能分析
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629353
L. Thiele, N. Stoimenov
{"title":"Modular performance analysis of cyclic dataflow graphs","authors":"L. Thiele, N. Stoimenov","doi":"10.1145/1629335.1629353","DOIUrl":"https://doi.org/10.1145/1629335.1629353","url":null,"abstract":"Applications for parallel and distributed embedded systems are often specified as dataflow graphs with dependency cycles. Examples of corresponding models of computation are marked graphs or synchronous dataflow (SDF) graphs. Performance analysis is often used in the exploration of different implementation alternatives or in order to provide guarantees on the timing behavior. This paper describes a new approach to the modular performance analysis of cyclic dataflow graphs such as SDF graphs as existing component-based analysis methods are not able to faithfully deal with cycles in the event flow. The new method results in tight bounds on essential quantities like buffer sizes, end-to-end delays and throughput. Because of the generality of the approach, one can analyze not only systems that can be modeled as marked graphs but also implementations that contain buffers with finite sizes, that produce system-wide back-pressure caused by blocking write semantics. The embedding of the novel approach into a modular performance analysis method allows the analysis of distributed implementations that use resource sharing mechanisms such as fixed-priority scheduling and time division multiple access (TDMA). The paper presents the new models and methods as well as experimental results.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115514492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 45
A cost-aware page replacement algorithm for NAND flash based mobile embedded systems 基于NAND闪存的移动嵌入式系统的成本感知页面替换算法
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629377
Junseok Park, Hyejeong Lee, S. Hyun, K. Koh, H. Bahn
{"title":"A cost-aware page replacement algorithm for NAND flash based mobile embedded systems","authors":"Junseok Park, Hyejeong Lee, S. Hyun, K. Koh, H. Bahn","doi":"10.1145/1629335.1629377","DOIUrl":"https://doi.org/10.1145/1629335.1629377","url":null,"abstract":"NAND flash memory is widely used as secondary storage in mobile embedded systems such as cellular phones and digital cameras. These systems usually employ a compressed file system (CFS) to store system files which are fixed during the design phase, in combination with a normal file system to store data files. Since retrieving pages from a CFS requires additional decompression time, it is reasonable to grant them higher priorities when making a page replacement decision. In this paper, we present a new page replacement algorithm for NAND flash memory based embedded systems that considers asymmetric operation cost of each page. The proposed algorithm considers the decompression cost of a page from CFS as well as the asymmetric I/O costs of reads and writes in flash memory. To do this, the algorithm partitions the memory space into a read area, a write area, and a compressed area depending on different operation costs. The size of each area is then dynamically adjusted based on the change of access patterns and the contribution to reducing the I/O costs. Trace-driven simulations show that the proposed algorithm improves the I/O performance of mobile embedded systems significantly. Specifically, it reduces I/O time by 4.8-53.3% compared to widely acknowledged algorithms such as CLOCK, CAR, and CFLRU.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126486355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
NANDFS: a flexible flash file system for RAM-constrained systems NANDFS:用于ram受限系统的灵活的闪存文件系统
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629374
A. Zuck, Ohad Barzilay, Sivan Toledo
{"title":"NANDFS: a flexible flash file system for RAM-constrained systems","authors":"A. Zuck, Ohad Barzilay, Sivan Toledo","doi":"10.1145/1629335.1629374","DOIUrl":"https://doi.org/10.1145/1629335.1629374","url":null,"abstract":"NANDFS is a flash file system that exposes a memory-performance tradeoff to system integrators. The file system can be configured to use a large amount of RAM, in which case it delivers excellent performance. In particular, when NANDFS is configured with the same amount of RAM that YAFFS2 uses, the performance of the two file systems is comparable (YAFFS2 is a file system that is widely used in embedded Linux and other embedded environments). But YAFFS2 and other state-of-the-art flash file systems allocate RAM dynamically and do not provide the system builder with a way to limit the amount ofmemory that they allocate. NANDFS, on the other hand, allows the system builder to configure it to use a specific amount of RAM. The performance of NANDFS degrades when the amount of RAM it uses shrinks, but the degradation is graceful, not catastrophic. NANDFS is able to provide this flexibility thanks to a novel data structure that combines a coarsegrained logical-to-physical mapping with a log-structured file system.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127001100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
On relational interfaces 关于关系接口
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629346
S. Tripakis, Ben Lickly, T. Henzinger, Edward A. Lee
{"title":"On relational interfaces","authors":"S. Tripakis, Ben Lickly, T. Henzinger, Edward A. Lee","doi":"10.1145/1629335.1629346","DOIUrl":"https://doi.org/10.1145/1629335.1629346","url":null,"abstract":"In this paper we extend the work of Alfaro, Henzinger et al. on interface theories for component-based design. Existing interface theories often fail to capture functional relations between the inputs and outputs of an interface. For example, a simple synchronous interface that takes as input a number n ≥ 0 and returns, at the same time, as output n + 1, cannot be expressed in existing theories. In this paper we provide a theory of relational interfaces, where such input-output relations can be captured. Our theory supports synchronous interfaces, both stateless and stateful. It includes explicit notions of environments and pluggability, and satisfies fundamental properties such as preservation of refinement by composition, and characterization of pluggability by refinement. We achieve these properties by making reasonable restrictions on feedback loops in interface compositions.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131609440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
Compositional timing analysis 成分时序分析
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629342
R. Salah, M. Bozga, O. Maler
{"title":"Compositional timing analysis","authors":"R. Salah, M. Bozga, O. Maler","doi":"10.1145/1629335.1629342","DOIUrl":"https://doi.org/10.1145/1629335.1629342","url":null,"abstract":"We develop and implement a methodology for automatic abstraction of systems defined as networks of timed components modeled by timed automata. The abstraction technique yields an abstract model with much less clocks and states which over-approximate the timed behavior of the concrete system. Using this technique we can analyze timed system of size beyond the capabilities of contemporary analysis tools for timed automata.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121033409","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Probabilistic modeling of data cache behavior 数据缓存行为的概率建模
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629370
V. Puranik, T. Mitra, Y. Srikant
{"title":"Probabilistic modeling of data cache behavior","authors":"V. Puranik, T. Mitra, Y. Srikant","doi":"10.1145/1629335.1629370","DOIUrl":"https://doi.org/10.1145/1629335.1629370","url":null,"abstract":"In this paper, we propose a formal analysis approach to estimate the expected (average) data cache access time of an application across all possible program inputs. Towards this goal, we introduce the notion of probabilistic access history that intuitively summarizes the history of data memory accesses along different program paths (to reach a particular program point) and their associated probabilities. An efficient static program analysis technique has been developed to compute the access history at all program points. We estimate the cache hit/miss probabilities and hence the expected access time of each data memory reference from the access history. Our experimental evaluation confirms the accuracy and viability of the probabilistic data cache modeling approach.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128962338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Aggressive dynamic voltage scaling for energy-aware video playback based on decoding time estimation 基于解码时间估计的能量感知视频播放的主动动态电压缩放
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629337
Ahron Yang, Minseok Song
{"title":"Aggressive dynamic voltage scaling for energy-aware video playback based on decoding time estimation","authors":"Ahron Yang, Minseok Song","doi":"10.1145/1629335.1629337","DOIUrl":"https://doi.org/10.1145/1629335.1629337","url":null,"abstract":"An effective way for reducing CPU power consumption is to reduce its operating frequency. But this slows down program execution, which may violate the real-time requirements of video playback. What is worse, it is difficult to predict future decoding times, and unduly conservative policies may miss viable opportunities to reduce the CPU frequency. The effectiveness of such power-saving techniques is thus dependent on an ability to estimate future demands on the CPU. We present the design, implementation and evaluation of a dynamic voltage scaling (DVS) scheme for portable media players. We measured decoding times on real videos and extracted a precise relationship between frame size and decoding time using logarithmic regression. Based on this model, we propose a frequency selection algorithm which accepts some deadline misses, and selects the frequencies required to achieve a specified deadline miss ratio. We implemented this scheme in MPlayer running on the Linux 2.6. Experimental results show that its system-wide energy consumption is up to 17% less than conventional DVS schemes and up to 24% less than non-DVS schemes.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114656676","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Markov decision process (MDP) framework for optimizing software on mobile phones 马尔可夫决策过程(MDP)框架优化软件在手机上
International Conference on Embedded Software Pub Date : 2009-10-12 DOI: 10.1145/1629335.1629338
Tang Lung Cheung, K. Okamoto, F. Maker, Xin Liu, V. Akella
{"title":"Markov decision process (MDP) framework for optimizing software on mobile phones","authors":"Tang Lung Cheung, K. Okamoto, F. Maker, Xin Liu, V. Akella","doi":"10.1145/1629335.1629338","DOIUrl":"https://doi.org/10.1145/1629335.1629338","url":null,"abstract":"We present a framework based on Markov decision process to optimize software on mobile phones. Unlike previous approaches in literature that focus on energy optimization while meeting a specific task-related time constraint, we model the desired talk-time as an explicit user given parameter and formulate the optimization of resources such as battery-life on a mobile phone as a decision processes that maximizes a user specified application specific reward or utility metric while meeting the talk-time constraint. We propose efficient techniques to solve the optimization problem based on dynamic programming and illustrate how it can be used in the context of realistic applications such as WiFi radio power optimization and email synchronization. We present a design methodology to use the proposed technique and experimental results using the Android platform from Google running on the HTC mobile phone.","PeriodicalId":143573,"journal":{"name":"International Conference on Embedded Software","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125059803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
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