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Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03最新文献

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A standard cell library for student projects 学生项目的标准单元库
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205272
J. Grad, J. Stine
{"title":"A standard cell library for student projects","authors":"J. Grad, J. Stine","doi":"10.1109/MSE.2003.1205272","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205272","url":null,"abstract":"A standard-cell library for MOSIS scaleable CMOS rules has been developed. It is intended for use with Synopsys Design Compiler, Cadence Silicon Ensemble, and Cadence Virtuoso or Magic. The library is targeted for the AMI 0.5 /spl mu/m process, which currently offers the smallest feature size in the MOSIS educational program. The library also includes I/O pad cells and fully places and routes a padframe if desired. All steps in the design flow are fully automated with only three scripts and have been tested successfully in a large VLSI design class at the Illinois Institute of Technology. To customize and run these three scripts, for a given design, typically takes less than five minutes, since all details are transparent to the students, allowing them to focus on the design instead of worrying about the tools.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122220067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 46
A new hardware/software codesign environment and senior capstone design project for computer engineering 一个新的硬件/软件协同设计环境和计算机工程高级顶点设计项目
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205258
R. Klenke, J. Tucker, J. M. Blevins
{"title":"A new hardware/software codesign environment and senior capstone design project for computer engineering","authors":"R. Klenke, J. Tucker, J. M. Blevins","doi":"10.1109/MSE.2003.1205258","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205258","url":null,"abstract":"This paper describes a design environment and platform developed to support senior capstone design projects in computer engineering that incorporates the concept of hardware/software codesign. A proposed capstone design project which utilizes this environment is also presented. This project is being undertaken by senior computer engineering students for the first time this year at the authors' university.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115773547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Microelectronics education as workforce development 作为劳动力发展的微电子教育
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205244
D. Landis, J. Cain
{"title":"Microelectronics education as workforce development","authors":"D. Landis, J. Cain","doi":"10.1109/MSE.2003.1205244","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205244","url":null,"abstract":"This paper describes the microelectronic design educationinitiatives sponsored by the Pittsburgh Digital Greenhouse.These programs were created to support a growing regionalcluster of microelectronic system design companies. Bothresident instruction and continuing education initiatives aredescribed, and progress to date is highlighted.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"153 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120939235","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Internet-based tool for system-on-chip integration 基于互联网的系统芯片集成工具
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205281
David Lim, Christopher E. Neely, Christopher K. Zuver, J. Lockwood
{"title":"Internet-based tool for system-on-chip integration","authors":"David Lim, Christopher E. Neely, Christopher K. Zuver, J. Lockwood","doi":"10.1109/MSE.2003.1205281","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205281","url":null,"abstract":"A tool has been created for use in a design course to automate integration of new components into a System-On-Chip(SOC). Students used this tool to implement a complete SOC Internet firewall, which was prototyped and tested using a field-programmable gate array (FPGA). Common components of the framework were completed as machine problem assignments throughout the first half of the semester. During the second half of the semester, students worked in small groups to design extensible modules, which included additional packet filters, a packet encryption engine, and replacement schedulers to enhance the functionality of the SoC firewall. The integration tool was used to manage project submissions and to synthesize designs for testing and project evaluation.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122406792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Teaching bus architectures with a basic, hands-on SOC platform 教学巴士架构与一个基本的，动手SOC平台
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205259
M. Bertola, G. Bois
{"title":"Teaching bus architectures with a basic, hands-on SOC platform","authors":"M. Bertola, G. Bois","doi":"10.1109/MSE.2003.1205259","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205259","url":null,"abstract":"This paper describes the progressive refinements that have been applied over the past three years to a VHDL model of a platform used as lab material for the course entitled: Specification and Design of H/S Embedded Systems. Emphasis is given to communication and architectural aspects.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124756442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Paradigm of design for biosystem-on-a-chip(BioSoC) 片上生物系统（BioSoC）的设计模式
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205295
R. Ewing, H. Abdel-Aty-Zohdy
{"title":"Paradigm of design for biosystem-on-a-chip(BioSoC)","authors":"R. Ewing, H. Abdel-Aty-Zohdy","doi":"10.1109/MSE.2003.1205295","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205295","url":null,"abstract":"The paradigm of design for biosystem-on-a-chip (BioSoC), is that multidisciplinary skills are required. Thus, the educational goals are to develop an understanding of micro/macro collaboration along with the ability to apply and use multidisciplinary skills for the design and performance evaluation of a \"biosystem on a chip\". The need for the architectural design of the BioSoC addresses the next-generation of intelligent information processing systems.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"153 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116729818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Teaching custom integrated circuit design and verification 定制集成电路设计与验证教学
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205290
D. Bouldin, Adam Miller, C. Tan
{"title":"Teaching custom integrated circuit design and verification","authors":"D. Bouldin, Adam Miller, C. Tan","doi":"10.1109/MSE.2003.1205290","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205290","url":null,"abstract":"Custom design of integrated circuits is required for the development of digital standard-cell and bit-slice libraries, analog circuits, and other specialized circuits that are not commercially available. Teaching students the design and verification flow at this physical level is valuable in that it provides the understanding and skills they will need to perform these functions in their subsequent employment. Moreover, experiencing custom design provides an appreciation of the tasks involved for those whose primary job functions will involve synthesis using vendor-supplied libraries. This paper describes the goals, content and experiences of a semester graduate course in which projects are verified not only with simulations but also with measurements on prototypes fabricated via MOSIS. A standard-cell library and test circuitry that are compatible with the Cadence toolset and AMIS-0.6 micron process are described. These are available at no charge to anyone via the world-wide web.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127709127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A system design and rapid prototyping of wearable computers course 可穿戴式计算机系统设计与快速成型课程
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205264
A. Smailagic, D. Siewiorek, Lu Luo
{"title":"A system design and rapid prototyping of wearable computers course","authors":"A. Smailagic, D. Siewiorek, Lu Luo","doi":"10.1109/MSE.2003.1205264","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205264","url":null,"abstract":"This paper describes a custom design approach as applied to power management in an innovative course on rapid prototyping of computer systems at Carnegie Mellon. We emphasize the importance of the choice of user interface modalities on power consumption of wearable computers. The paper identifies the major components of power consumption in a wearable computer, and evaluates their respective contributions to power consumption. We have quantified the power consumption of text-, graphics-, and speech-based interfaces, providing a guideline for the design of future wearable/mobile computer systems.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"20 38","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132545472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Analog Integrated Circuit Design Laboratory 模拟集成电路设计实验室
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205269
A. Mondragón-Torres, T. Mayhugh, J. P. D. Gyvez, J. Silva-Martínez, E. Sánchez-Sinencio
{"title":"An Analog Integrated Circuit Design Laboratory","authors":"A. Mondragón-Torres, T. Mayhugh, J. P. D. Gyvez, J. Silva-Martínez, E. Sánchez-Sinencio","doi":"10.1109/MSE.2003.1205269","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205269","url":null,"abstract":"We present the structure of an analog integrated circuit design laboratory to instruct at both, senior undergraduate and entry graduate levels. The teaching material includes: a laboratory manual with analog circuit design theory, pre-laboratory exercises and circuit design specifications; a reference web page with step by step instructions and examples; the use of mathematical tools for automation and analysis; and state of the art CAD design tools in use by industry. Upon completion of the course, the students have skills for an entry level analog designer position.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115255647","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Hardware/software co-training by FPGA/ASIC synthesis and programming of a RISC microprocessor-core 硬件/软件协同训练由FPGA/ASIC合成并编程一个RISC微处理器核心
Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 Pub Date : 2003-06-01 DOI: 10.1109/MSE.2003.1205288
J. Becker, C. Bieser, Alexander Thomas, K. Müller-Glaser, J. Becker
{"title":"Hardware/software co-training by FPGA/ASIC synthesis and programming of a RISC microprocessor-core","authors":"J. Becker, C. Bieser, Alexander Thomas, K. Müller-Glaser, J. Becker","doi":"10.1109/MSE.2003.1205288","DOIUrl":"https://doi.org/10.1109/MSE.2003.1205288","url":null,"abstract":"This paper describes the combination of educating both, hardware and software with one practical lab. The needs to offer such a co-training concept are brought out by the demands of industry towards the desired skills of today's engineers. An engineer's view must no longer be restricted to his/her own work, but has to be widened to a complete system view. To provide an appropriate education scheme the university courses have to adapt to these changes. Therefore an innovative lab concept is presented here. Its goal is to improve students skills not only in a single direction, but to deliver an efficient inter disciplinary hardware software lab course, combined with training state-of-the-art industrial architectures and relevant tools.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"29 23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130554962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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