{"title":"Demand-Side Resources for Electric Energy Management","authors":"S. Sisodiya, G. Kumbhar","doi":"10.1109/ICEES.2018.8442335","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8442335","url":null,"abstract":"Demand side management (DSM) is a scheduling of demand side resources (DSRs) activities such that the desired load shape change can be obtained for better electric power services. These sources are scheduled and optimized for obtaining various objectives as minimization of the cost or maximization of benefits for customers, utilities and environment with the best quality services of electric energy. The purpose of this paper is to provide basic information for the development of algorithms for optimal scheduling for the home energy management (HEM), building energy management (BEM) and distribution system energy management (DSEM) for the objectives.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"14 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120918243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Transformerless Inverter using Charge Pump Circuit For Photovoltaic Application","authors":"M. Suvedha, R. Ramaprabha","doi":"10.1109/ICEES.2018.8443278","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8443278","url":null,"abstract":"The leakage current is reduced by implementing a new transformerless inverter along with charge pump circuit concept. This topology consists of MOSFET switches (S1-S4), two diodes (D1-D2), two capacitors (C1-C2) and output filter (Lf, Cf). The leakage current is minimized and common mode voltage is created. Negative voltage is created by the charge pump circuit. The ripple present in output side is reduced by using the technique unipolar sinusoidal pulse width modulation (SPWM). The filter requirements are also reduced in the proposed inverter. The inverter has the following advantages 1) compact size 2) high efficiency 3) leakage current is minimized. Simulation results are presented using MATLAB.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114116364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Numerical Computational analysis of supercapacitive storage with various type of loads to measure the response of five level inverter to integrate with lightning energy storage system","authors":"Suman Jana, P. Biswas","doi":"10.1109/ICEES.2018.8442368","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8442368","url":null,"abstract":"As lightning energy produces very high voltage and very high current, normal storage devices like batteries, flywheel, normal capacitors cannot handle that huge voltage and current and also they don't have ability to store the energy within the fraction of second, so this experiment shows the viability of supercapacitor as energy storage device integrated with lightning-energy system. All the experiment has been conducted in numerical computing environment to experiment the viability of supercapacitor integrated five level inverter within lightning-energy storage device. The presented paper shows the response of five level inverter connected with various loads as RL Load, Permanent Magnet Synchronous Machine Load and Grid. The five level inverter has been integrated with supercapacitive storage to measure the response of inverter with supercapacitor and also to measure the variation in supercapacitor for various load.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124071710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparitive study of Single Phase Power Factor Correction based on Fixed and Variable PWM Techniques using Bridgeless Cuk Converter","authors":"G. Marimuthu, M. Ari","doi":"10.1109/ICEES.2018.8443290","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8443290","url":null,"abstract":"This paper deals withthe comparative study of single phase Power Factor Correction (PFC)based on fixed Pulse Width Modulation (PWM) and variable frequency control techniquesusing Bridgeless Cuk converter. Design equations and state model of the BridglessCuk converter to aid the control loop are derived based on the modes of operation. The control strategy uses an outer Proportional Integral (PI) controller to normalize output voltage and inner PI controller to shape the input current. PI controller parameters are determined using Tyreus-Luben method. Simulation results are presented to validate the two approaches. Advantages of the proposed scheme are simple method of generating reference currents using the multiplier approach, power factor close to unity, low %THD, regulated output voltage for load variations and effective set point tracking.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"773 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126208631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparison of High K/Metal Gate Based CMOS Amplifiers Performance with Traditional Gate Stack Structure","authors":"M. Swathi, D. Anand, A. Purushothaman, S. Gopalan","doi":"10.1109/ICEES.2018.8443264","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8443264","url":null,"abstract":"In accordance with the Moore's law the electronic industry has benefited enormously from MOSFET scaling for the last several decades. The traditional SiO2 has been replaced with high K dielectric such as Hf O2and ZrO2 in order to reduce the tunneling leakage through the gate. Other changes in to the traditional MOS structure introduced in the 45 nm node includes the use of metal gate electrode as opposed to the conventional poly -Silicon and use of strained Silicon in the channel. While the traditional MOS structure has changed since 45nm node(2007), design of circuit is still being done based on the traditional poly-Si/SiO2/Si structure. This paper aims to analyze transistor characteristics with different gate stack combinations including high- K dielectrics, and metal gate and strained Silicon substrate. The result have been compared with that of traditional poly-Si/SiO2/Si structure. Further the performance of a CMOS amplifiers using different gate stack combination has been analyzed. It was found that the transistor characteristics improved significantly when SiO2is replaced with high-K material with or with out metal gate. It was also found that while the power consumption of high- K based amplifier is lower, considerable improvement in gain is achieved.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121858532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Six Phase Wind Power Generation","authors":"C. Kalaivani, K. Rajambal","doi":"10.1109/ICEES.2018.8443254","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8443254","url":null,"abstract":"Multiphase Induction Generators employed in wind energy conversion system (WECS) prevails with precedence over the three phase generators. This work suspires to develop a wind electric power generation system utilizing six phase induction generator. The scheme is build using m-file coding in Matlab/Simulink. The machine performance is studied for different operating conditions. The power flow characteristics is analyzed for varying wind velocities and the results realized through simulation are conferred for validation of the proposed system.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134187950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance Analysis of Reduced Switch Boost Multilevel Hybrid Converter","authors":"S. Jeyasudha, B. Geethalakshmi","doi":"10.1109/ICEES.2018.8442395","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8442395","url":null,"abstract":"Ahstract- This work proposes a novel topology of reduced switch boost multilevel hybrid converter (RSBMHC) which has the capability to obtain multilevel AC output and DC output voltages from a DC input voltage concurrently. This RSBMHC topology is developed for a smart residential application of solar PV system (SPV). The simulation of the topology is worked out by using MATLAB/Simulink, and the investigated performance of the RSBMHC is compared with the basic multilevel inverter (MLI). The proposed topology gives the results of, reduction in number of semiconductor component count of basic cascaded MLI, reduction of losses created in the circuit, and reduction in cost of the converter, reduction in the installation area.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124106296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance Analysis of Different Transform Methods for Image Steganography: A LabVIEW approach","authors":"G. Rao, K. D. Rao","doi":"10.1109/ICEES.2018.8442349","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8442349","url":null,"abstract":"In this paper, we present a scheme for performance analysis of transform methods namely DCST, FDOST, BIOR2.2 and Haar for image steganography using LabVIEW approach with four stego keys with one, two, three and four LSB bits to embed person details in person image (Online e-filing application form). In this work, hidden text message containing the personal details with different payload (1kbyte to 4kbytes) converted into binary, and then the binary hidden message is embedded into the cover image to obtain stego image. The stego image is transformed using DCST, FDOST, bior2.2, and Haar to produce DCST, FDOST, bior2.2 and Haar coefficients. The hidden message using different keys with the original image is retrieved by applying four different inverse transform methods. LabVIEW programming tools are used for the development of scheme presented and execution of the graphical code for simulation. Finally, the performance of the four methods is analyzed using image quality metrics PSNR and MSE with and without steganography.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124668352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power Quality Enhancement for PV rooftop and BESS in Islanded mode","authors":"Jatin M. Soni, M. Pandya","doi":"10.1109/ICEES.2018.8442370","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8442370","url":null,"abstract":"the operation of renewable source in islanding mode has challenging issues of power quality and power capacity. In this paper, the control strategy is proposed to integrate Photovoltaic (PV) with energy storage in context of power quality. A one house that has PV rooftop and Battery as an energy storage device is operated in islanded mode. This control scheme is also proposed for charging and discharging of Battery Energy Storage System (BESS). The power for AC load of the house is supplied by this PV and BESS system. MATLAB/SIMULINK results with system models are providing validation of the proposed control strategy as per IEEE 519 standard for power quality.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130000741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Jacintha, K.H. Shakthimuruzan, V. Kripakaran, S. Lokeshwaran
{"title":"FPGA Based Dual Redundancy CAN Controller with Fault Tolerance","authors":"V. Jacintha, K.H. Shakthimuruzan, V. Kripakaran, S. Lokeshwaran","doi":"10.1109/ICEES.2018.8443204","DOIUrl":"https://doi.org/10.1109/ICEES.2018.8443204","url":null,"abstract":"Ahstract- CAN (Controller Area Network) has emerged to be one among the most prominent data bus which has the following features, which are anti-interference capability, reduced cost as well as ease of maintenance. Hence in this paper we propose, a Dual Redundancy CAN-bus Controller (DRCC) rooted strongly on FPGA chip. Earlier the method for dual redundancy CAN-bus is accomplished only with the help of software, which obviously has the following disadvantages such as reliability issues and meager real-time performance. Hence, a hardware based redundancy management unit is successfully brought forth in this paper, which is developed on the error handling rule with a CAN specification version of 2.0. A multicore redundant FPGA based CAN-bus Controller (DRCC) is developed. The design is incorporated into a Altera Cyclone II chip for testing purpose and it is confirmed that the design meets the requirement needed for high realistic achievement and dependability, with emerging trends for the forthcoming years.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132850128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}