{"title":"基于高K/金属栅极的CMOS放大器与传统栅极堆叠结构的性能比较","authors":"M. Swathi, D. Anand, A. Purushothaman, S. Gopalan","doi":"10.1109/ICEES.2018.8443264","DOIUrl":null,"url":null,"abstract":"In accordance with the Moore's law the electronic industry has benefited enormously from MOSFET scaling for the last several decades. The traditional SiO2 has been replaced with high K dielectric such as Hf O2and ZrO2 in order to reduce the tunneling leakage through the gate. Other changes in to the traditional MOS structure introduced in the 45 nm node includes the use of metal gate electrode as opposed to the conventional poly -Silicon and use of strained Silicon in the channel. While the traditional MOS structure has changed since 45nm node(2007), design of circuit is still being done based on the traditional poly-Si/SiO2/Si structure. This paper aims to analyze transistor characteristics with different gate stack combinations including high- K dielectrics, and metal gate and strained Silicon substrate. The result have been compared with that of traditional poly-Si/SiO2/Si structure. Further the performance of a CMOS amplifiers using different gate stack combination has been analyzed. It was found that the transistor characteristics improved significantly when SiO2is replaced with high-K material with or with out metal gate. It was also found that while the power consumption of high- K based amplifier is lower, considerable improvement in gain is achieved.","PeriodicalId":134828,"journal":{"name":"2018 4th International Conference on Electrical Energy Systems (ICEES)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Comparison of High K/Metal Gate Based CMOS Amplifiers Performance with Traditional Gate Stack Structure\",\"authors\":\"M. Swathi, D. Anand, A. Purushothaman, S. Gopalan\",\"doi\":\"10.1109/ICEES.2018.8443264\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In accordance with the Moore's law the electronic industry has benefited enormously from MOSFET scaling for the last several decades. The traditional SiO2 has been replaced with high K dielectric such as Hf O2and ZrO2 in order to reduce the tunneling leakage through the gate. Other changes in to the traditional MOS structure introduced in the 45 nm node includes the use of metal gate electrode as opposed to the conventional poly -Silicon and use of strained Silicon in the channel. While the traditional MOS structure has changed since 45nm node(2007), design of circuit is still being done based on the traditional poly-Si/SiO2/Si structure. This paper aims to analyze transistor characteristics with different gate stack combinations including high- K dielectrics, and metal gate and strained Silicon substrate. The result have been compared with that of traditional poly-Si/SiO2/Si structure. Further the performance of a CMOS amplifiers using different gate stack combination has been analyzed. It was found that the transistor characteristics improved significantly when SiO2is replaced with high-K material with or with out metal gate. It was also found that while the power consumption of high- K based amplifier is lower, considerable improvement in gain is achieved.\",\"PeriodicalId\":134828,\"journal\":{\"name\":\"2018 4th International Conference on Electrical Energy Systems (ICEES)\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 4th International Conference on Electrical Energy Systems (ICEES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEES.2018.8443264\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 4th International Conference on Electrical Energy Systems (ICEES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEES.2018.8443264","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Comparison of High K/Metal Gate Based CMOS Amplifiers Performance with Traditional Gate Stack Structure
In accordance with the Moore's law the electronic industry has benefited enormously from MOSFET scaling for the last several decades. The traditional SiO2 has been replaced with high K dielectric such as Hf O2and ZrO2 in order to reduce the tunneling leakage through the gate. Other changes in to the traditional MOS structure introduced in the 45 nm node includes the use of metal gate electrode as opposed to the conventional poly -Silicon and use of strained Silicon in the channel. While the traditional MOS structure has changed since 45nm node(2007), design of circuit is still being done based on the traditional poly-Si/SiO2/Si structure. This paper aims to analyze transistor characteristics with different gate stack combinations including high- K dielectrics, and metal gate and strained Silicon substrate. The result have been compared with that of traditional poly-Si/SiO2/Si structure. Further the performance of a CMOS amplifiers using different gate stack combination has been analyzed. It was found that the transistor characteristics improved significantly when SiO2is replaced with high-K material with or with out metal gate. It was also found that while the power consumption of high- K based amplifier is lower, considerable improvement in gain is achieved.