Marzieh Ekhtiari, E. Bruun, M. Andersen, Zhe Zhang
{"title":"Bi-directional high-side current sense circuit for switch mode power supplies","authors":"Marzieh Ekhtiari, E. Bruun, M. Andersen, Zhe Zhang","doi":"10.1109/ICECS.2014.7050064","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050064","url":null,"abstract":"In order to control a power supply using piezoelectric transformer, AC current in the transformer needs to be measured. Due to the control strategy it is necessary to measure amplitude, phase angle and zero crossing of this current. In some applications there is common ground between primary and secondary sides of the transformer which is internally implemented inside the transformer. Therefore, current must be measured from the high voltage line in the presence of high input switching voltage. This paper proposes a resistive current sensing circuit based on discrete components useful for input voltages on the order of 200 V. The bandwidth is at least 200 kHz to allow fundamental frequency detection of piezoelectric transformers in use.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123482840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Savary, W. Rahajandraibe, S. Meillére, E. Kussener, H. Barthélemy, J. Czarny, Hélène Lhermet, P. Robert
{"title":"High resolution NEMS smart audio sensor based on resistive silicon nano wires for hearing aids","authors":"E. Savary, W. Rahajandraibe, S. Meillére, E. Kussener, H. Barthélemy, J. Czarny, Hélène Lhermet, P. Robert","doi":"10.1109/ICECS.2014.7050046","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050046","url":null,"abstract":"This paper presents a smart sensor microphone based on silicon nanowire resistive gauge for hearing aid applications through cochlear implant. The system includes the sensor together with its bias circuit, the preconditioning stage and the digital interface that ease integration on heterogenic system. One important concern of audio field is the wide dynamic range addressed since human hear is able to sense sound pressure level ranging from μPa to a few Pa. The hundred dB dynamic range circuit was designed to achieve the maximum resolution with a deep submicron CMOS technology suitable for implementation of extensive digital signal processing required in most today's application. Power consumption issue involved by application requirement is addressed with usual trade off related to embedded device. This is done at system level with a topology optimization.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126240550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Crystal-less duty-cycled-when-active IR-UWB transceivers","authors":"Xiao Y. Wang, R. Dokania, A. Apsel","doi":"10.1109/ICECS.2014.7050119","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050119","url":null,"abstract":"The short time duration of IR-UWB signals offer unique opportunities for bit-level duty-cycling when-active that is not possible with radios based on traditional modulation techniques, which must be duty-cycled at a coarser scale. We save substantial power by turning on the transceiver only when needed both in transmission and in reception. We leverage this simple-sounding concept in a custom IR-UWB based physical layer specification that eliminates the need for precise frequency matching through well-matched external crystals. We demonstrate that our methods are compatible with traditional packet-based networking schemes by implementing a FPGA based baseband and MAC layer.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126461991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Radiation-hardened techniques for CMOS flash ADC","authors":"U. Gatti, C. Calligaro, E. Pikhay, Y. Roizin","doi":"10.1109/ICECS.2014.7049906","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7049906","url":null,"abstract":"This work presents a rad-hard 4-bit 10MHz Flash ADC for space applications. The converter has been developed using rad-hardened techniques both at architecture and layout levels. The design takes into account the different effects of the radiation that could damage the circuits in harsh environments. The ADC has been integrated in a standard CMOS 0.18-μm technology by TowerJazz. The prototype has been tested with a custom methodology and showed a Total Dose immunity up to 300krad.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126516335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Khatib, Claire Aupetit, A. Chagoya, C. Chevalier, G. Sicard, L. Fesquet
{"title":"Distributed asynchronous controllers for clock management in low power systems","authors":"C. Khatib, Claire Aupetit, A. Chagoya, C. Chevalier, G. Sicard, L. Fesquet","doi":"10.1109/ICECS.2014.7050001","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050001","url":null,"abstract":"In digital electronic systems, the power consumption is nowadays a standard non-functional specification. Therefore the design of such complex SoCs in the nanoscale technologies is now constrained by many parameters such as the energy consumption and the robustness to process variability. Basically the implementation of a gated clock structure is a good way to limit the dynamic power consumption. Nevertheless, this needs extra computation to determine which part of the circuit has to be switched off. Moreover, the insertion of asynchronous interfaces instead of synthezising gated clock in an existing system is one way to quickly provide a robust framework for power reduction. In this paper, we introduced a novel methodology-based on a set of simple distributed asynchronous controllers - to efficiently implement gated clock at the system level. This approach has been successfully applied to an AXI bus-based system with a negligible hardware cost compared to the equivalent fully-synchronous system. The obtained results indicate that the proposed technique can have a significant impact on the power consumption with a low redesign cost.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114080477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Torsten Mähne, Zhi Wang, Benoit Vernay, Liliana Andrade, C. Aoun, J. Chaput, M. Louërat, F. Pêcheux, A. Krust, G. Schropfer, M. Barnasconi, K. Einwich, Fabio Cenni, O. Guillaume
{"title":"UVM-SystemC-AMS based framework for the correct by construction design of MEMS in their real heterogeneous application context","authors":"Torsten Mähne, Zhi Wang, Benoit Vernay, Liliana Andrade, C. Aoun, J. Chaput, M. Louërat, F. Pêcheux, A. Krust, G. Schropfer, M. Barnasconi, K. Einwich, Fabio Cenni, O. Guillaume","doi":"10.1109/ICECS.2014.7050122","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050122","url":null,"abstract":"Each new embedded system tends to integrate more sensors with tight software-driven control, digitally assisted analog circuits, and heterogeneous structure. A more responsive simulation environment is needed to support the co-design and verification of such complex architectures including all its digital hardware/software and analog/multi-physical aspects using Multi-Disciplinary Virtual Prototyping (MDVP). Taking a Micro-Electro-Mechanical System (MEMS) vibration sensor as an example, we introduce a reusable framework based on the state-of-the-art technologies SystemC AMS, Finite Elements/Reduced-Order modeling, and UVM to design, simulate, and verify such systems in their real application context.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"19 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114012502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Digital pulse frequency modulation for switched capacitor DC-DC converter on 65nm process","authors":"Dima Kilani, B. Mohammad, H. Saleh, M. Ismail","doi":"10.1109/ICECS.2014.7050067","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050067","url":null,"abstract":"DC-DC converter is one of the most important building blocks in any System-on-Chip (SoC). DC-DC converter has the functional capabilities to supply various voltage levels to various loads of the chip in a way to achieve high power efficiency. Pulse Frequency Modulation is considered as the main control technique for voltage regulation of the Switched Capacitor DC-DC power converter. This paper proposes a design of a digital Pulse Frequency Modulation using Verilog-HDL and verified on 65nm low power process technology. The design includes the generation of the non-overlapping clock by the ring oscillator and the dead time circuit instead of the default clock. PFM has a total power of 7μW, area of 46.4μm2 and a slack time of 0.5ns.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131110845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Dimitrios Stamoulis, D. Rodopoulos, B. Meyer, D. Soudris, Z. Zilic
{"title":"Linear regression techniques for efficient analysis of transistor variability","authors":"Dimitrios Stamoulis, D. Rodopoulos, B. Meyer, D. Soudris, Z. Zilic","doi":"10.1109/ICECS.2014.7049973","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7049973","url":null,"abstract":"Prior art on time-zero/-dependent variability shows its importance for digital system reliability throughout a typical integrated circuit (IC) lifetime. Timing analysis results could be questionable if the impact of such variations is not taken properly into consideration. Modern models can accurately capture transistor variability but they suffer from prolonged execution times. In this paper, we employ linear regression analysis to accelerate transistor variability estimation. Compared to commercial transistor-level Static Timing Analysis (STA) tools, we achieve a 4.63× average speedup and a 3.56× average memory usage reduction for standard cells and ISCAS85 benchmark circuits, with negligible accuracy degradation.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131212642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Nicolas, A. Giry, E. Abdallah, S. Bories, G. Tant, T. Parra, C. Delaveaud, P. Vincent, F. Po
{"title":"SOI CMOS tunable capacitors for RF antenna aperture tuning","authors":"D. Nicolas, A. Giry, E. Abdallah, S. Bories, G. Tant, T. Parra, C. Delaveaud, P. Vincent, F. Po","doi":"10.1109/ICECS.2014.7050002","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7050002","url":null,"abstract":"This paper provides a detailed analysis of a SOI CMOS tunable capacitor for antenna tuning. Design expressions for a switched capacitor network are given and quality factor of the whole network is expressed as a function of design parameters. Application to antenna aperture tuning is described by combining a 130 nm SOI CMOS tunable capacitor with a printed notch antenna. The proposed tunable multiband antenna can be tuned from 420 MHz to 790 MHz, with an associated radiation efficiency in the 33-73% range.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134147380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-efficiency CMOS rectifier dedicated for multi-band ambient RF energy harvesting","authors":"Y. Wang, M. Sawan","doi":"10.1109/ICECS.2014.7049951","DOIUrl":"https://doi.org/10.1109/ICECS.2014.7049951","url":null,"abstract":"Several rectifier topologies dedicated for radio frequency (RF) energy harvesting have been proposed, but only a few have been reported to be able to harvest RF energy at low input power (LIP) levels. In this paper, we are focusing on fully gate cross-coupled (FGCC) rectifier structure, which gives good performance at LIP levels. In order to get an enough high output DC voltage, a 3-stage FGCC rectifier using low-threshold-voltage (LTV) transistors is designed. According to simulation results, with 850MHz input AC signal, the designed rectifier has power conversion efficiency (PCE) of 70% at 20μW (-17.0dBm) input power with 100kOhms load. Also, a multi-band RF energy harvesting topology is proposed. Simulation results show that PCE of the tri-channel rectifier achieves 66.3% at 4.8μW (-23.2dBm) input power per channel and 1V DC output voltage is generated at 5.1μW (-22.9dBm) input power per channel with only 100kOhms load, showing both high-efficiency and sensitivity.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114774435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}