{"title":"Mind the gap [electric trains]","authors":"D. Fisher","doi":"10.1049/ESS:20060303","DOIUrl":"https://doi.org/10.1049/ESS:20060303","url":null,"abstract":"Engineers working on electric trains have struggled with the problem of ensuring that the pantographs keep as much contact with the overhead line as possible without damaging it in one of the harshest environments for electronics known. One system has stepped into the breach. Experience of electronics on trains dictates that both input circuit protection and galvanic isolation are essential (RIA 13 & EN50155). PanChex and the original pantograph telemetry developed by BR Research had used voltage to frequency and voltage to frequency conversion to enable digital transmission of analogue signals over a fibre optic cable. Although this method is useful for simple systems, it suffers from thermal drift. A small change in gain inherently creates a large change in output offset voltage. It was decided from the outset of this project that a standard analogue-to digital converter (ADC) preceded by a high performance instrumentation amplifier would be used to digitise the analogue signals from the sensors.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116094055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"One way to build class [C++ language]","authors":"C. Walls","doi":"10.1049/ess:20060202","DOIUrl":"https://doi.org/10.1049/ess:20060202","url":null,"abstract":"In the second part of an exploration of the benefits of C++ for embedded systems, we describe how to implement a write-only port and progressively make it a more capable class. This case study gives us the opportunity to investigate other approaches to and benefits to be gained from the encapsulation of expertise that C++ can offer.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122236576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Necessary invention [design tools]","authors":"C. Edwards","doi":"10.1049/ESS:20060203","DOIUrl":"https://doi.org/10.1049/ESS:20060203","url":null,"abstract":"Rene Penning de Vries, the chief technology officer at Philips Semiconductors, is less than happy with the direction that the design-tools suppliers have taken, forcing the company to do more tools work inhouse than it should need to. One area where Philips Semiconductors has made a lot of development investment is in system-in-package (SiP) design. Its Caen research centre has developed a number of SiP techniques but Rene Penning de Vries said the electronic design automation (EDA) and test industries have some work to do.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131163018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Silicon sandwich [system-in-a-package]","authors":"L. Collins","doi":"10.1049/ESS:20060206","DOIUrl":"https://doi.org/10.1049/ESS:20060206","url":null,"abstract":"System-in-package looks to be an attractive option for projects that cannot justify a system-on-chip approach. SiP is a functional building block containing multiple die and possibly discretes in one semiconductor package. Its key advantage is adaptability, as the approach is appropriate for low or high volumes, and can handle mixed die and process technologies. SiP designs should also have lower development and non-recurring engineering (NRE) costs than SoC approaches. Among the disadvantages were the cumulative yields losses involved in linking the many devices that make up an SIP lower performance, and the availability or otherwise of known good die. System-in-package looks to be an attractive option for projects that cannot justify a system-on-chip approach. But there are many obstacles still to be overcome before it becomes mainstream, say people working with the technology.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116045883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tricks of the light","authors":"L. Collins, C. Edwards","doi":"10.1049/ESS:20060107","DOIUrl":"https://doi.org/10.1049/ESS:20060107","url":null,"abstract":"Physical IC design keeps getting more difficult as efforts to extend optical lithography beyond the 65nm generation impose limits on layouts. Process engineers have decided that they are stuck with the type of ultraviolet light that they use today in chipmaking for at least the next couple of generations of chip technology. The 193nm wavelength appeared with the 90nm process just as research on 157nm wound up because of problems with lenses and resists. That means the wavelength of light used to draw features on a chip is several times larger than the features themselves. As minimum process dimensions have shrunk to even smaller fractions of the illumination wavelength, various post-layout optimizations have been introduced to compensate for diffraction effects that result. Optical proximity correction techniques ensure that very closely spaced layout features can be formed on the wafer, by taking account of the way that light patterning one feature interferes with light patterning its neighbor. These corrections have been joined by other resolution enhancement techniques that continue to put pressure on designers to conform to increasingly complicated rules. At the same time, the techniques make the relationship between the original layout and what appears on the wafer less certain.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130801184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reusing safety-critical software in aviation","authors":"J. Matharu","doi":"10.1049/ESS:20060105","DOIUrl":"https://doi.org/10.1049/ESS:20060105","url":null,"abstract":"The reuse of safety-critical software components will fundamentally change the future of software development for safety-critical embedded systems in military and avionics applications. Economic incentives and software complexity have made it desirable to develop reusable software components that can be integrated into a number of safety-critical systems. With reusable software component approvals for a DO-178B Level-A operating system, software reuse is much improved for the safety-critical embedded systems used in avionics systems. Software reuse fundamentally change the future of embedded software development by improving developer productivity, controlling software quality reducing product schedule risks and minimizing overall development costs: all things of great importance to any systems engineering organization.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116338239","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The simulated testbed","authors":"A. Bunting, A. Roberts","doi":"10.1049/ESS:20060104","DOIUrl":"https://doi.org/10.1049/ESS:20060104","url":null,"abstract":"The use of hardware-in-the-loop tools and test automation in engine-management verification and validation has helped speed up development for car makers. System integration and hardware-software integration can be performed to a very detailed level, including the effect of interface tolerances, ensuring the completed designs interactions are predictable and robust. The use of hardware-in-the-loop verification and the associated simulations and models naturally leads to a reduction in the use of resources such as vehicles, end-of-line test facilities and the number of prototype parts and vehicles required supporting development. Furthermore, hardware-in-the-loop techniques have been shown to have applications outside the development process, including the rapid resolution of field issues, helping to limit potential customer dissatisfaction.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123973884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Putting C++ on a diet","authors":"C. Walls","doi":"10.1049/ess:20060102","DOIUrl":"https://doi.org/10.1049/ess:20060102","url":null,"abstract":"C++ can deliver real benefits specifically for the implementation of embedded software, as long as you make sure the compiler does not try to pile on the pounds when it generates code.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122917744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Heat signature [data security]","authors":"C. Evans-Pughe","doi":"10.1049/ESS:20060101","DOIUrl":"https://doi.org/10.1049/ESS:20060101","url":null,"abstract":"By looking at heat and electromagnetic radiation, hackers have developed ever more ingenious methods for accessing apparently secure data held within smartcard and other silicon chips. They monitor characteristics such as execution time, power consumption and electromagnetic radiation and then apply advanced statistical analysis techniques. Using these techniques security keys have been successfully extracted from microprocessors, field-programmable gate arrays and custom chips. In fact, this type of non-invasive side-channel attack is now considered a real threat for any device in which the security IC is easily observable.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131296178","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Divide and conquer [SoC design]","authors":"F. Rémond, P. Bougant, T. McCracken, P. Pezzati","doi":"10.1049/ESS:20060103","DOIUrl":"https://doi.org/10.1049/ESS:20060103","url":null,"abstract":"The complexity of chip-level integration has held back the effective logic density of SoC designs - making it difficult to build complex chips, such as high-integration set-top box controllers. That could change as teams adopt methods taking advantage of tools that can deal with logical and physical partitions separately. At the physical level, system-on-chip (SoC) design methods have evolved to increase density and shorten implementation time by improving predictability on timing, routing and design integrity closure. Methods based on physical partitions have taken full advantage of emerging tools and available chip density. The effectiveness of the approach comes from three elements that have been made available recently in back-end tools.","PeriodicalId":132835,"journal":{"name":"Electronic Systems and Software","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130530280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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