Divide and conquer [SoC design]

The complexity of chip-level integration has held back the effective logic density of SoC designs - making it difficult to build complex chips, such as high-integration set-top box controllers. That could change as teams adopt methods taking advantage of tools that can deal with logical and physical partitions separately. At the physical level, system-on-chip (SoC) design methods have evolved to increase density and shorten implementation time by improving predictability on timing, routing and design integrity closure. Methods based on physical partitions have taken full advantage of emerging tools and available chip density. The effectiveness of the approach comes from three elements that have been made available recently in back-end tools.