First International Symposium on Networks-on-Chip (NOCS'07)最新文献_第2页

NoC Communication Strategies Using Time-to-Digital Conversion 基于时间-数字转换的NoC通信策略

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.29

C. D'Alessandro, N. Minas, K. Heron, D. Kinniment, A. Yakovlev

引用次数: 1

Thermal Impacts on NoC Interconnects 对NoC互连的热影响

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.43

Sheng Xu, I. Benito, W. Burleson

{"title":"Thermal Impacts on NoC Interconnects","authors":"Sheng Xu, I. Benito, W. Burleson","doi":"10.1109/NOCS.2007.43","DOIUrl":"https://doi.org/10.1109/NOCS.2007.43","url":null,"abstract":"Thermal issues are an increasing concern in microelectronics due to increased power density as well as the increasing vulnerability of the system to temperature effects (delay, leakage, reliability). NoCs promise to relieve many of the scaling problems that arise with increasing levels of on-chip system integration. This paper addressed the impacts on NoC interconnect circuits under harsh uniform temperature changes and non-uniform spatial temperature distribution profiles. Temporal and spatial thermal variations were addressed in 65 nm, 45 nm and 32 nm interconnect circuits. Standard repeater insertion and differential current sensing techniques have been implemented. The circuits were analyzed in temperatures as high as 150degC for the temporal variations, with a maximum temperature difference through wire of up to 50degC. High temperature caused more delay and power overhead in smaller technologies, i.e. 45 nm and 32 nm, by as much as 71% at 150degC for a given wirelength of 3 mm in 32 nm. Spatial temperature distribution profile influenced the propagation delay by 14.7% for a maximum thermal gradient of 50degC in the worst case for a 32 nm, 3 mm repeated wire. However, the delay degradation of an alternative differential current sensing (DCS) technique is largely determined by the amplifier temperature. Future work may consider the modeling of self-heating of the interconnect circuits","PeriodicalId":132772,"journal":{"name":"First International Symposium on Networks-on-Chip (NOCS'07)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131702024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 17

Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances 树的网格:统一网格和MFPGA为更好的设备性能

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.27

Z. Marrakchi, H. Mrabet, C. Masson, H. Mehrez

引用次数: 17

NOC-centric Security of Reconfigurable SoC 以noc为中心的可重构SoC安全性

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.32

J. Diguet, S. Evain, R. Vaslin, G. Gogniat, E. Juin

引用次数: 114

Reducing Interconnect Cost in NoC through Serialized Asynchronous Links 通过串行异步链路降低NoC互连成本

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.37

S. Ogg, Enrico Valli, C. D'Alessandro, A. Yakovlev, B. Al-Hashimi, L. Benini

引用次数: 5

NoC: Network or Chip? 网络还是芯片?

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.33

I. Cidon

{"title":"NoC: Network or Chip?","authors":"I. Cidon","doi":"10.1109/NOCS.2007.33","DOIUrl":"https://doi.org/10.1109/NOCS.2007.33","url":null,"abstract":"Summary form only given. The concept of a communication network emerged, many times in the past, for connecting a large number of systems, replacing dedicated point-to-point connection and other small-scale interconnection mechanisms. Each network needs to provide a cost effective solution for a large number of possibly conflicting requirements such as flexibility, scalability, reliability and performance. Therefore, the task of network architects and designers is to solve multiple instances of a complex constrained optimization problem resulting in numerous and diverse network solutions. For example, there are different standards and architectures associated with interconnection networks, home networks, LANs, MANs, WANs and wireless networks. In this paper, we map the common lessons and concepts from the networking research to the emerging NoC field. We argue that the NoC optimization problem consists of several distinguished types that should lead to multiple diverse solutions. NoC network layer architectures pose new challenges in exploring solutions to traditional networking problems such as routing, quality-of-service, flow and congestion control and reliability. The unique characteristics of silicon chips require new solutions to these classical problems, and define a new set of NoC specific problems, such as automatic network design process, power and area optimization and specialized system functionalities. We speculate which class of solutions is likely to fit the different NoC types","PeriodicalId":132772,"journal":{"name":"First International Symposium on Networks-on-Chip (NOCS'07)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-05-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130302270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing 一种用于NoC动态路由的模数混合路由网络

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.2

T. Mak, N. P. Sedcole, P. Cheung, W. Luk, K. Lam

引用次数: 12

Towards Open Network-on-Chip Benchmarks 实现开放的片上网络基准

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.44

C. Grecu, André Ivanov, P. Pande, A. Jantsch, E. Salminen, Ümit Y. Ogras, R. Marculescu

引用次数: 4

Implementing DSP Algorithms with On-Chip Networks 用片上网络实现DSP算法

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.25

Xiang Wu, T. Ragheb, A. Aziz, Y. Massoud

引用次数: 29

A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing 采用分层环进行全局路由的片上网络混合环/网状互连

First International Symposium on Networks-on-Chip (NOCS'07) Pub Date : 2007-05-07 DOI: 10.1109/NOCS.2007.3

S. Bourduas, Z. Zilic

引用次数: 103