IEEE Transactions on Microwave Theory and Techniques最新文献

{"title":"A Large-Scale, Low-Power, Compact 5G mm-Wave Phased-Array Transceiver in 45 nm RFSOI CMOS","authors":"Seungjae Baek;Jooseok Lee;Kihyun Kim;Seungwon Park;Hansik Oh;Taewan Kim;Joonho Jung;Jinhyun Kim;Sehyug Jeon;Jee Ho Park;Woojae Lee;Jaehong Park;Dong-Hyun Lee;Sangho Lee;Jeong Ho Lee;Ji Hoon Kim;Younghwan Kim;Sangyong Park;Bohee Suh;Soyoung Oh;Dongsoo Lee;Juho Son;Yifei Chen;Sung-Gi Yang","doi":"10.1109/TMTT.2025.3544620","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3544620","url":null,"abstract":"This work describes a compact <inline-formula> <tex-math>$2times 16$ </tex-math></inline-formula>-channel phased-array transceiver IC designed for millimeter-wave (mm-Wave) applications over 24.25–29.5 GHz, fabricated using 45 nm radio frequency silicon-on-insulator (RFSOI) CMOS technology. The design achieves high RF performance and occupies a compact die area. It features a Doherty power amplifier (PA) that achieves a high linear output power (POUT) of 14.5 dBm at a third-order intermodulation distortion (IMD3) of -25 dBc, as well as a compact low-noise amplifier (LNA) with a wide-band noise figure (NF) below 2.75 dB over the operating frequency range. In transmitter (TX) mode, the transceiver IC delivers an average POUT greater than 11.0 dBm/Ch., with an error vector magnitude (EVM) of -25 dB, while consuming less than 155 mW/Ch. In receiver (RX) mode, it records an NF ranging from 3.2 to 3.7 dB, with power consumption below 48.8 mW/Ch. The entire size of the transceiver IC is 59.8 mm2, with each channel occupying a die area of 1.87 mm2.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"2097-2110"},"PeriodicalIF":4.1,"publicationDate":"2025-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Compact Dual-Mode Dual-Band CMOS Power Amplifier Covering 5G FR1 and FR2","authors":"Jingye Zhang;Jiawen Chen;Taotao Xu;Pei Qin;Xiang Yi;Liang Wu;Haoshen Zhu;Wenquan Che;Quan Xue","doi":"10.1109/TMTT.2025.3543447","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3543447","url":null,"abstract":"This article presents a dual-mode, dual-band power amplifier (PA) capable of covering both the fifth-generation (5G) FR1 and FR2 bands for 5G user equipment driver applications. The common-mode (CM) path, often overlooked in a typical differential-mode (DM) CMOS PA, is analyzed and utilized as an alternative path to cover a second frequency band. A universal topology is proposed for the utilization of both DM and CM in PA and other RF circuits. By assigning the millimeter-wave (mm-Wave) and sub-7 GHz bands to DM and CM paths, respectively, this PA achieves coverage of both 3.5 and 27 GHz bands with only one amplifying stage and consequently a compact layout. On the DM path, the proposed PA achieves a <inline-formula> <tex-math>${P}_{1{text{dB}}}$ </tex-math></inline-formula> and <inline-formula> <tex-math>${mathrm {PAE}}_{1{text {dB}}}$ </tex-math></inline-formula> of 18.1 dBm and 32.4% at 24 GHz, while on the CM path, the corresponding performance is 15.3 dBm and 35.5% at 3.7 GHz. The proposed PA exhibits an adjacent channel leakage ratio (ACLR) of −25.9 dBc, an average power-added efficiency (PAE) of 17%, and an average output power of 12.4 dBm at −24.7 dB EVMRMS with a 64 QAM 200 MSym/s modulation signal at 26 GHz in DM. Similarly, with 256 QAM 50 MSym/s modulation at 3.6 GHz in CM, the PA demonstrates −35.6 dBc ACLR, 22.5% average PAE, and 10.7 dBm average power at −31.1 dB EVMRMS. Furthermore, measurements with two carriers at 24 and 3.7 GHz indicate that the PA has the potential for concurrent operation in both modes. The PA is fabricated in a 65 nm CMOS process with a core area of 0.32 mm2.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"1985-1999"},"PeriodicalIF":4.1,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Ka-Band Four-Beam High-Linearity Transmitter With Beam Interference Cancellation for SATCOM Multibeam Communication","authors":"Huiyan Gao;Shaogang Wang;Xinhong Xie;Nayu Li;Hang Lu;Yen-Cheng Kuan;Xiaopeng Yu;Chunyi Song;Qun Jane Gu;Zhiwei Xu","doi":"10.1109/TMTT.2025.3542097","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3542097","url":null,"abstract":"This article presents a 27.7–31.2-GHz highly integrated eight-element, four-beam transmitter front end in 65-nm CMOS for phased-array multibeam communication. To eliminate beam interference in multibeam coherent communication, an interference cancellation scheme is introduced within the multibeam transmitter. In the circuit design, the proposed hybrid variable-gain amplifiers (VGAs) combine digital common-source (CS) VGAs and analog Gilbert-cell-based VGAs to achieve both a large dynamic range and high resolution. The hybrid VGAs are then embedded into a transmission-line-based network, forming a compact <inline-formula> <tex-math>$4times 4$ </tex-math></inline-formula> beam combining structure. To support multibeam phase steering, four pairs of Gm arrays interpolate four individual phase sates from the same I/Q signals generated by low- and high-pass lumped delay lines. These delay lines are inserted between CS transistors and common-gate (CG) transistors to isolate the impedance fluctuates of magnetic coupling resonance load across frequency. To manage the high peak-to-average power ratio (PAPR) modulation signal, the output stage employs a symmetrical transformer-based Doherty load modulation network and an analog adaptive gain control in the auxiliary path to improve the power-back-off (PBO) efficiency. With a 1.1-V supply voltage, this transmitter achieves a saturated output power (Psat) of 19.2 dBm with a 20.5% channel efficiency (CE) and an output power 1-dB compression point (OP1dB) of 18.2 dBm. The measured maximum drain efficiency (DE) is 40.8%, while the 6-dB PBO DE is 28%, indicating improvements of 40%/180% compared to the normalized class-B/A implementations. The proposed hybrid VGA achieves a 27-dB tuning range and a 0.25-dB gain step with 0.26-dB/1.9° root mean square (rms) gain/phase errors, while the phase shifter (PS) implements 6-bit, 360° phase shifting with 0.25-dB/2.5° rms gain/phase errors, enabling precise gain tapering and beam steering.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"2009-2022"},"PeriodicalIF":4.1,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Sub-6 GHz Wideband Transceiver Chipset With Calibration-Friendly Harmonic Rejection RF Front-Ends","authors":"Haoyu Bai;Ling Hao;Dong Wang;Ningyuan Zhang;Keer Gao;Jiaqi He;Jiazheng Zhou;Junhua Liu;Huailin Liao","doi":"10.1109/TMTT.2025.3535587","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3535587","url":null,"abstract":"This article presents a transmitter (TX) and receiver (RX) system operating in the 0.1–6 GHz frequency range with multi-protocol compatibility, which integrates local oscillator (LO) harmonic rejection (HR) radio frequency front-ends (RFFE) spanning 0.1–2.5 GHz, with frequency-adaptive calibration capabilities. In the HR-RFFE, programmable RC networks are deployed in both the TX and RX to achieve intermediate frequency (IF) domain HR and pre-calibration. An 8-phase LO signal generation, utilizing a D flip-flop (DFF) based chain, is employed to facilitate HR calibration. To mitigate HR degradation caused by LO phase errors, the TX employs a cross-connected Gilbert phase detector (PD) to assess the orthogonality of 90° shifted LO signals, enabling LO calibration. For the receiver, phase errors are directly calculated via the baseband (BB) output at a much lower frequency. Fabricated in 40-nm CMOS technology, the TX features a core area of 1.2 mm2, a programmable gain range of -12–26 dB, a P1dB compression point of 16.1 dBm, and a system efficiency of 25.9%. The third and fifth harmonic rejection ratios (HRRs) exceed 46.9 and 53.5 dBc, respectively. The receiver, which incorporates an integrated ADPLL, shows a core area of 1.4 mm2, a maximum gain of 68.4 dB, a minimum noise figure of 3.9 dB, and an odd-order HRR exceeding 71 dBc.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"2084-2096"},"PeriodicalIF":4.1,"publicationDate":"2025-02-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"2024 Reviewers List","authors":"Almudena Suarez","doi":"10.1109/TMTT.2025.3531020","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3531020","url":null,"abstract":"","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 2","pages":"692-702"},"PeriodicalIF":4.1,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10877712","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143361021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Editori-in-Chief Call for Applicants","authors":"","doi":"10.1109/TMTT.2025.3537525","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3537525","url":null,"abstract":"","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 2","pages":"1285-1285"},"PeriodicalIF":4.1,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10877701","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143361259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Common-Mode Behavior Optimization for a D-Band Class-AB Power Amplifier Achieving 32 Gb/s in 22-nm CMOS FD-SOI","authors":"Giacomo Venturini;Patrick Reynaert","doi":"10.1109/TMTT.2025.3533900","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3533900","url":null,"abstract":"This article presents a D-band (110–170 GHz) power amplifier (PA) for future 6G wireless infrastructure implemented using the 22-nm CMOS FD-SOI technology from GlobalFoundries. The design features a fully differential power combiner with extremely low insertion loss. The differential nature of the combiner, together with careful local bypass placing and sizing boost the common-mode-rejection-ratio (CMRR) of the output matching network (OMN), improving the power gain and output-referred 1-dB compression point (<inline-formula> <tex-math>$text {OP1}_{text {dB}}$ </tex-math></inline-formula>) of the amplifier. The power stage is biased in deep class AB, inherently increasing back-off efficiency and <inline-formula> <tex-math>$text {OP1}_{text {dB}}$ </tex-math></inline-formula>, and is cascaded to moderate class AB gain stages for overall flat gain response. Matching networks are implemented using stacked transformers, which are also exploited for supply and bias feed lines. Series resistors are placed on bias lines to stabilize the common-mode (CM) loops and are optimized for linearity. The small-signal gain of the amplifier is 16 dB, and the 3-dB bandwidth (BW) is 21 GHz centered at 140 GHz. The <inline-formula> <tex-math>$text {OP1}_{text {dB}}$ </tex-math></inline-formula> is 11.4 dBm, and the saturated output power (<inline-formula> <tex-math>${P}_{text {sat}}$ </tex-math></inline-formula>) is 14.6 dBm. The maximum power-added efficiency (PAE) and 6-dB backoff PAE are 10.6% and 2.8%, respectively. Applying a 16-QAM signal without any predistortion, the highest measured baud rate is 8 GB, resulting in a 32-Gb/s data rate, at an average output power and PAE of 8.1 dBm and 4.2%, respectively.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"1975-1984"},"PeriodicalIF":4.1,"publicationDate":"2025-02-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 28/39 GHz Concurrent/Band-Switching LNA With Three-Winding Transformer and Common-Gate-Based Multiplexer Supporting Multistream and Multiband 5G FR2 Communication","authors":"Depeng Cheng;Xuwei Li;Xuhao Jiang;Qin Chen;Xin Chen;Xujun Ma;Lianming Li","doi":"10.1109/TMTT.2025.3529990","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3529990","url":null,"abstract":"In this article, a 28/39 GHz band reconfigurable low noise amplifier (LNA) is designed with concurrent and band-switching operation modes, aiming to flexibly support multiband and multistream 5G FR2 communication. For facilitating integration with a multiband antenna, the LNA first-stage leverages an ultra-compact three-winding transformer (TF) coupling technique, enabling relatively high power gain and low noise figure (NF) across both 28 and 39 GHz bands. Moreover, we adopt a <inline-formula> <tex-math>$pi $ </tex-math></inline-formula>-model of the three-winding transformer to decompose the complex optimization problem into passive network matching and active cell improvement, bringing in more intuitive and rigorous design insights and guidance. In the following stage, a band-multiplexer is implemented using two switchable parallel <inline-formula> <tex-math>$g_{m}$ </tex-math></inline-formula>-boosting common-gate (CG) amplifiers, which separate the wideband signals into frequency division signal paths, thereby supporting concurrent and band-switching modes. Moreover, the LNA output stages in separated paths can be independently optimized, meeting each sub-band specific requirements. Fabricated in a 65-nm CMOS process, the LNA occupies a compact core area of 0.1 mm2. In the band-switching mode, it achieves 26.3/25.5 dB peak gain, 3-dB bandwidth of 21.8–30.3 GHz/32.6–45.1 GHz, 3.6/3.8 dB minimum NF, −18.5/−16.4 dBm third-order intercept point (IIP3), more than 10.3/15.7 dB out-of-band rejection for 28/39 GHz band, respectively, and consumes 19.2 mW with a 1.2 V power supply. In the concurrent mode, the LNA achieves 22.9/23 dB peak gain, 4.97/4.9 dB minimum NF, −14.7/−12.4 dBm IIP3, more than 10/11 dB out-of-band rejection for 28/39 GHz band, and a power consumption of 38.4 mW.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"1924-1937"},"PeriodicalIF":4.1,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"LO Generation for a 5G Phased Array Transceiver: A High HRR 21–27-GHz Frequency Quadrupler","authors":"Caglar Ozdag;Arun Paidimarri;Masayuki Yoshiyama;Yuichiro Yamaguchi;Yujiro Tojo;Bodhisatwa Sadhu","doi":"10.1109/TMTT.2025.3529344","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3529344","url":null,"abstract":"A 21–27-GHz frequency quadrupler in the 0.13-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m SiGe BiCMOS technology with the 0-dBm output power (<inline-formula> <tex-math>$P_{text {OUT}}$ </tex-math></inline-formula>) and 40-dBc harmonic rejection ratio (HRR) is presented. A method for load—pull-based output network design is introduced to co-optimize HRR and <inline-formula> <tex-math>$P_{text {OUT}}$ </tex-math></inline-formula>; as a result, the design achieves flat and high HRR and <inline-formula> <tex-math>$P_{text {OUT}}$ </tex-math></inline-formula> across 25% bandwidth and a wide input power (<inline-formula> <tex-math>$P_{text {IN}}$ </tex-math></inline-formula>) range. This article also discusses the quadrupler’s <inline-formula> <tex-math>$P_{text {OUT}}$ </tex-math></inline-formula> and HRR specifications in the context of its integration within a phased-array antenna module (PAAM). We designed two versions of the 64-element wideband 5G phased-array PAAM, one including and one excluding the quadrupler, to demonstrate the minimal impact of the quadrupler on the output spectrum. We also measure the spur performance in dual-polarization mode to evaluate cross-polarization spurs. The spurious emissions across <inline-formula> <tex-math>$P_{text {OUT}}$ </tex-math></inline-formula> range of the phased array is better than −20 dBm/MHz, well below the 3GPP 5G FR2 limit of −15 dBm/MHz. The quadrupler design has the highest HRR performance reported among wideband mmWave quadruplers and thoroughly demonstrates, for the first time, the impact of the local oscillator (LO) frequency multiplier on the performance of a wideband phased-array system.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"2073-2083"},"PeriodicalIF":4.1,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Compact 24–30-GHz GaN Front-End Module With Coupled-Resonator-Based Transmit/Receive Switch for 5G Millimeter-Wave Applications","authors":"Dingyuan Zeng;Haoshen Zhu;Guangxu Shen;Qi Cai;Outong Gao;Wenquan Che;Quan Xue","doi":"10.1109/TMTT.2025.3530435","DOIUrl":"https://doi.org/10.1109/TMTT.2025.3530435","url":null,"abstract":"This article presents a wideband front-end module (FEM) topology with integrated transmit/receive (T/R) switch utilizing a matching network (MN) reuse technique. The output MN (OMN) of the power amplifier (PA) and the input MN (IMN) of the low noise amplifier (LNA) are reused in the switch network co-design, enabling T/R switching and impedance transformation simultaneously. In TX mode, a switchless MN incorporating RX reactance is employed to improve the output power and efficiency. In RX mode, the OMN of the PA serves as an extra resonant tank and can be absorbed into the RX MN to enhance RX bandwidth and noise performance. To validate the proposed FEM topology, we implemented a 24–30-GHz FEM for 5G millimeter-wave (mmWave) applications using a commercial 0.15-<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m gallium nitride (GaN) high-electron-mobility transistor (HEMT) process. The TX branch achieves a small-signal gain greater than 17 dB, a 14.5%–17% saturated power-added efficiency (PAE), and 27.4–29.5-dBm saturated output power. The average output power, measured at an error vector magnitude (EVM) of less than −25 dB, is 21.9 dBm with an average PAE of 4%. The RX branch demonstrates a small-signal gain of 18.5 dB, a noise figure (NF) of less than 4.4 dB, and an OP<inline-formula> <tex-math>$_{text {1, dB}}$ </tex-math></inline-formula> of 12 dBm. In addition, the chip area is only <inline-formula> <tex-math>$2.1times 2.6$ </tex-math></inline-formula> mm.","PeriodicalId":13272,"journal":{"name":"IEEE Transactions on Microwave Theory and Techniques","volume":"73 4","pages":"1938-1950"},"PeriodicalIF":4.1,"publicationDate":"2025-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143800753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}