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2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs最新文献

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Relaxation of current filament due to RFC technology and ballast resistor for robust FWD operation 由于RFC技术和稳健的FWD操作的镇流器电阻，电流灯丝的松弛
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs Pub Date : 2011-05-23 DOI: 10.1109/ISPSD.2011.5890799
A. Nishii, Katsumi Nakamura, F. Masuoka, T. Terashima
{"title":"Relaxation of current filament due to RFC technology and ballast resistor for robust FWD operation","authors":"A. Nishii, Katsumi Nakamura, F. Masuoka, T. Terashima","doi":"10.1109/ISPSD.2011.5890799","DOIUrl":"https://doi.org/10.1109/ISPSD.2011.5890799","url":null,"abstract":"We have investigated the destruction mechanism of High Voltage (HV) Free Wheeling Diodes (FWD) during a reverse recovery operation. The most possible mode of the destruction phenomena originate in local heating due to current filament at the edge portion of the active area. To achieve a large reverse recovery Safe Operation Area (SOA), we focus on the boundary region between the active area and the termination area. To enforce our Relaxed Field of Cathode (RFC) concept [1, 2], it is more effective for the wider SOA to place a ballast resistance for avoiding the current from crowding around the anode region in the top surface of the diode.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125548208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
Effect of oxygen annealing temperature on AlGaN/GaN HEMTs 氧退火温度对AlGaN/GaN HEMTs的影响
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs Pub Date : 2011-05-23 DOI: 10.1109/ISPSD.2011.5890834
O. Seok, Young-shil Kim, Jiyong Lim, M. Han
{"title":"Effect of oxygen annealing temperature on AlGaN/GaN HEMTs","authors":"O. Seok, Young-shil Kim, Jiyong Lim, M. Han","doi":"10.1109/ISPSD.2011.5890834","DOIUrl":"https://doi.org/10.1109/ISPSD.2011.5890834","url":null,"abstract":"We have investigated an effect of oxygen annealing temperature on the leakage current and breakdown voltage of AlGaN/GaN HEMTs. The breakdown voltage of 8 30 V and a low drain leakage current of 1.2 nA/mm at VDS= 50 V and VGS= −5 V are exhibited by employing oxygen annealing at 550°C. The blocking characteristics are improved with increasing annealing temperature up to 550°C due to high density of deep traps generated by oxygen annealing. However, the blocking characteristics of the annealed device were degraded when the annealing temperature exceeds 550°C due to thermal damage on the surface of AlGaN/GaN HEMTs.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126837128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Ultra low loss trench gate PCI-PiN diode with VF<350mV 超低损耗沟栅PCI-PiN二极管，VF<350mV
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs Pub Date : 2011-05-23 DOI: 10.1109/ISPSD.2011.5890796
M. Tsuda, Y. Matsumoto, I. Omura
{"title":"Ultra low loss trench gate PCI-PiN diode with VF<350mV","authors":"M. Tsuda, Y. Matsumoto, I. Omura","doi":"10.1109/ISPSD.2011.5890796","DOIUrl":"https://doi.org/10.1109/ISPSD.2011.5890796","url":null,"abstract":"PiN diode forward voltage drop was reduced to as low as 325mV by the pulsed carrier injection (PCI) mechanism with trench MOS gate as the integrated injection control switch. The conventional PiN diodes have voltage drop of about 0.8V which is equivalent to 1%–2% energy loss in home appliances. The proposed PCI-PiN diode reduces the loss by more than 50% and the diode structure has process compatibility to conventional IGBTs and trench MOSFETs for easy implementation into mass production. The authors also confirmed PCI concept with the experiment with BSIT.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114909868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integration of 100V LDMOS devices in 0.35μm CMOS technology 采用0.35μm CMOS技术集成100V LDMOS器件
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs Pub Date : 2011-05-23 DOI: 10.1109/ISPSD.2011.5890819
S. T. Kong, P. Stribley, Chris Lee, M. Ong
{"title":"Integration of 100V LDMOS devices in 0.35μm CMOS technology","authors":"S. T. Kong, P. Stribley, Chris Lee, M. Ong","doi":"10.1109/ISPSD.2011.5890819","DOIUrl":"https://doi.org/10.1109/ISPSD.2011.5890819","url":null,"abstract":"Successful integration of 100V LDMOS devices in 0.35μm CMOS technology is presented in this paper. These integrated devices are enhanced N-type and P-type LDMOS which are compatible with thin (14nm) and thick (40nm) layers of gate oxide. A breakdown voltage of more than 100V with R<inf>DS</inf> (ON) =200/180mΩ.mm<sup>2</sup> for N-type LDMOS and R<inf>DS</inf> (ON) =690/640mΩ.mm<sup>2</sup> for P-type LDMOS with 14nm/40nm gate oxide thickness.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"252 1-2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114048020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High breakdown voltage AlGaN/GaN HEMT by employing selective fluoride plasma treatment 选择性氟离子等离子体处理高击穿电压AlGaN/GaN HEMT
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs Pub Date : 2011-02-01 DOI: 10.1002/PSSC.201000548
Young-shil Kim, Jiyong Lim, O. Seok, M. Han
{"title":"High breakdown voltage AlGaN/GaN HEMT by employing selective fluoride plasma treatment","authors":"Young-shil Kim, Jiyong Lim, O. Seok, M. Han","doi":"10.1002/PSSC.201000548","DOIUrl":"https://doi.org/10.1002/PSSC.201000548","url":null,"abstract":"We proposed and fabricated AlGaN/GaN HEMT with high stable reverse blocking characteristics employing fluoride plasma treatment using CF4 gas. The plasma treatment with various rf power was performed selectively on drain-side gate edge region where electric field was concentrated. Unlike normally-off process, fluoride plasma treatment with attenuated RF power expanded gate depletion region in the direction of drain electrode. Expansion of depletion was confirmed by the change of measured off-state gate-drain capacitance. Expanded gate depletion spread E-field more uniformly with reducing peak of field intensity and prevented from drastic surface potential drop at the gate edge under large reverse bias condition. By the mitigation of field concentration and gradual potential change due to plasma treatment, was leakage current reduced and high breakdown voltage achieved. The breakdown voltage of plasma treated device with optimized rf power was 1400 V while that of untreated sample was 900 V. The leakage current of plasma treated device was 9.5 nA.","PeriodicalId":132504,"journal":{"name":"2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126793408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
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