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2022 Iranian International Conference on Microelectronics (IICM)最新文献

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High-sensitivity biosensor based on junctionless transistor using Si/Si 0.5Ge0.5 hybrid heterostructure: A potential device for SARS-CoV-2 sensing 基于Si/Si 0.5Ge0.5杂化异质结构无结晶体管的高灵敏度生物传感器:一种潜在的SARS-CoV-2传感装置
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152459
M. Fallahnejad, Maryam Shaveisi
{"title":"High-sensitivity biosensor based on junctionless transistor using Si/Si 0.5Ge0.5 hybrid heterostructure: A potential device for SARS-CoV-2 sensing","authors":"M. Fallahnejad, Maryam Shaveisi","doi":"10.1109/IICM57986.2022.10152459","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152459","url":null,"abstract":"In this paper, the performance of silicon-on-insulator junctionless (JL) transistors is reported as a biosensor for SARS-CoV-2 (COVID-19) detecting through proteins of virus using the dielectric modulated method (DMM). In this structure, which is designed based on Si/Si0.5Ge0.5 hybrid heterostructures junctionless transistor (HH-JLT), both cavities are placed on the side of the gates. In this way, the optimization of device is performed for cavity design by considering the effect of Hf02 regions as a spacer. The performance of the biosensor for detection is proven by analyzing the important parameters such as threshold voltage, ION/IOFF ratio and transconductance (gm). For the optimal proposed structure, the threshold voltage (Vth) and subthreshold slope (SS) sensitivity are obtained 7.5 and 0.45 respectively, for biomolecules with K=4.1. In addition of the DC sensitivity analysis, the sensitivity of RF parameters such as cutoff frequency (ft), transconductance generation factor (TGF), transconductance frequency product (TFP) and gain bandwidth product (GBW) is evaluated for charged biomolecules, the results exhibit that the increase in sensitivity with charge density changes is also considerable.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"276 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133681858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Core-offset inline-MZI Based Fiber Optic Sensor for Refractive Index Measurement 一种用于折射率测量的芯偏置内联mzi光纤传感器
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152396
Asma Malekpour, Meysam Saeedi, V. Ahmadi
{"title":"A Core-offset inline-MZI Based Fiber Optic Sensor for Refractive Index Measurement","authors":"Asma Malekpour, Meysam Saeedi, V. Ahmadi","doi":"10.1109/IICM57986.2022.10152396","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152396","url":null,"abstract":"A core-offset fiber based inline-MZI sensor, which has considerable benefits such as easy fabrication process, compactness, and high sensitivities to refractive index (RI) changes is fabricated. In this work, we enhance its performance by optimizing the sensor structure’ parameters. After reaching the highest RI sensitivity at optimized sensing length and target loss, the C-band wavelength is examined to achieve the sensitivity of 100 nm/RIU.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125100187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Critical Charge Dependency of Single Event Upset (SEU) on the Supply Voltage in Nanometric CMOS SRAMs 单事件干扰(SEU)的临界电荷对纳米CMOS sram电源电压的依赖性
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152417
M. Soleimaninia, G. Raisali, A. Moslehi
{"title":"Critical Charge Dependency of Single Event Upset (SEU) on the Supply Voltage in Nanometric CMOS SRAMs","authors":"M. Soleimaninia, G. Raisali, A. Moslehi","doi":"10.1109/IICM57986.2022.10152417","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152417","url":null,"abstract":"Rapid scaling of integrated devices and circuits has been led to the serious concerns in nanometric technologies. Continuous downscaling of CMOS technology has been resulted into the decrease in the critical charge of memory devices like SRAM in nanometric technologies and made them more susceptible to Single Event Upsets (SEUs). Critical charge as the criterion of SEU vulnerability, is the minimum charge required to change a memory cell which is mainly attributed to the scaling of the supply voltage. In this paper, the dependence of critical charge on the supply voltage in a 65-nm CMOS SRAM has been studied. To this purpose, a memory cell was designed using Silvaco TCAD tool and incident particles with different values of Linear Energy Transfer (LET) struck on it. Then, the critical charge has been calculated at three supply voltages. The results exhibit significant changes of critical charge due to supply voltage variations. So that, lowering in the supply voltage has been resulted to the decrease in critical charge.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126179020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Iterative Clipping and Filtering Algorithm for PAPR Reduction in OFDM System 一种降低OFDM系统PAPR的迭代裁剪滤波算法
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152419
A. Nasri, Mostafa Katebi, Sirous Toofan, Mohammad Mostafavi
{"title":"An Iterative Clipping and Filtering Algorithm for PAPR Reduction in OFDM System","authors":"A. Nasri, Mostafa Katebi, Sirous Toofan, Mohammad Mostafavi","doi":"10.1109/IICM57986.2022.10152419","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152419","url":null,"abstract":"Peak-to-average power ratio (PAPR) one of the most important issues in orthogonal frequency division multiplexing (OFDM). Iterative clipping and filtering (CF) is a high efficiency technique to reduce PAPR in OFDM systems, but it needs numerous iterations to minimize the peak regrowth problem. This paper presents a new CF method which requires one iteration. The previous method needs 2K+1 IFFT/FFT blocks where K is iterations number. By using this algorithm, the number of FFT and IFFT operations have been decreased to three. The simulated results show that the QPSK modulated OFDM signal with 528 sub-carriers achieves a P APR reduction of 6.1 dB by passing the OFDM signal from white Gaussian noise channel with a good bit error rate performance at the receiver.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117025493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementing Real-Time Low-Power Audio Effect with FPGA 用FPGA实现实时低功耗音频效果
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152352
Saman Moghanloo, B. Ebrahimi
{"title":"Implementing Real-Time Low-Power Audio Effect with FPGA","authors":"Saman Moghanloo, B. Ebrahimi","doi":"10.1109/IICM57986.2022.10152352","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152352","url":null,"abstract":"In this paper, a low-power, fast time-to-market, field programmable gate array (FPGA)-based audio effect is designed from the standard settings used by a musician in virtual studio technology (VST) to provide harsh and heavy distortion for bass guitar's sound. The FPGA only costs around 29 US dollars, and including the research time, it took less than 20 days to design the system from scratch up to programming the hardware. The FPGA itself only consumes 41 mW, and thus the system could be powered by a 9 V alkaline battery. This device can update its configuration with a USB cable, enabling aftermarket configuration update and variation.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"491 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126521535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Variable precision, mixed fixed/floating point MAC unit for DNN accelerators 用于DNN加速器的可变精度，混合固定/浮点MAC单元
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152326
Ali Talebi, Morteza Mousazadeh
{"title":"Variable precision, mixed fixed/floating point MAC unit for DNN accelerators","authors":"Ali Talebi, Morteza Mousazadeh","doi":"10.1109/IICM57986.2022.10152326","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152326","url":null,"abstract":"Artificial intelligence has become more popular than ever in past few years. Deep neural networks are being used in various use cases e.g., image processing, data analysis and etc. MAC operations are the core of DNNs thus making MAC units a very crucial element of any DNN accelerator. This paper presents a Variable precision, mixed fixed/floating point MAC unit capable of performing single precision floating-point MAC. Also, proposed MAC unit features additional modes for performing one 32-bit fixed-point MAC or two concurrent 16-bit fixed-point MACs or four concurrent 8-bit fixed-point MACs. Aside from high flexibility in number precision, proposed MAC unit uses recurring Karatsuba algorithm to implement higher bit-count multiplication only by using 8-bit multiplier and 8-bit adders. Proposed MAC unit has achieved 44.64 MOPS in 32-bit floating-point, 44.64 MOPS in 32-bit fixed-point, 89.29 MOPS in 16-bit fixed-point and 178.57 MOPS in 8-bit fixed-point on FPGA board ‘NEXYS 4 DDR’ featuring XILINX ‘xc7al00tcsg324-1’ FPGA chip.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114745621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
FinFET-based Low-Power Approximate Multiplier for Neural Network Hardware Accelerator 基于finfet的神经网络硬件加速器低功耗近似乘法器
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152438
Faraz Baraati, Milad Tanavardi Nasab, R. Ghaderi, Kian Jafari
{"title":"FinFET-based Low-Power Approximate Multiplier for Neural Network Hardware Accelerator","authors":"Faraz Baraati, Milad Tanavardi Nasab, R. Ghaderi, Kian Jafari","doi":"10.1109/IICM57986.2022.10152438","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152438","url":null,"abstract":"Approximate computing is a novel method in the field of designing hardware circuits and software algorithms. In some applications where approximate results and close to exact results are sufficient for our purposes, approximate computing can be used to reduce the circuit design costs to achieve higher accuracy. This paper proposes two new approximate multipliers based on approximate compressors. In proposed multipliers, NAND gates are used to generate the partial products, and we used the DUAL technique to normalize partial products at the compress level. FinFET 7nm technology is used to design the multipliers circuits and are simulated using HSPICE tool. Moreover, MATLAB evaluated the proposed multipliers in the neural network applications. According to the results, hardware parameters such as power consumption, delay, and area overhead have been optimized in the proposed multipliers compared to other designs. Also, higher accuracy in the applications of neural networks has been achieved. In the comparison to the state of the art counterparts, first proposed multiplier improved accuracy by 0.8%, and second multiplier, improved accuracy by 1%. Also, the delay and power consumption improved up to 15% and 44% respectively.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134101654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Linearity Improvement of the CMOS Power Amplifier with Auxiliary Path 带辅助路径的CMOS功率放大器线性度的改进
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152361
A. Nasri, S. Toofan
{"title":"Linearity Improvement of the CMOS Power Amplifier with Auxiliary Path","authors":"A. Nasri, S. Toofan","doi":"10.1109/IICM57986.2022.10152361","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152361","url":null,"abstract":"In this paper, a differential Cascode power amplifier has been presented. This P A includes two Cascode structure paths, main and auxiliary. This structure not only increases the drain efficiency but also improves linearity thanks to adopting auxiliary path. To achieve better linearity, two common source (CS) transistors have been biased in the different bias point (the main path CS transistor is biased in class-B, and the auxiliary path CS transistor is biased in class-AB). This work is analyzed and simulated in 0.18μm CMOS technology. The PAE and gain are achieved around 49.3% and 27.6dB for the input power of 6dBm, respectively while generating 30dBm output power. Also, the simulated ACPR for 16QAM with 6dB PAPR is −32dBc and −51dBc at offset frequency 5MHz and 10MHz, respectively.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134306809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fabrication and characterization of two concentric microring laser 双同心微环激光器的制备与表征
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152390
Alireza Kavousi, F. Moradiani, G. Parsanasab
{"title":"Fabrication and characterization of two concentric microring laser","authors":"Alireza Kavousi, F. Moradiani, G. Parsanasab","doi":"10.1109/IICM57986.2022.10152390","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152390","url":null,"abstract":"In this paper, we report the fabrication and characterization of two concentric microring polymer lasers. The experimental results of this laser have been compared with single microring lasers. Experimental results have illustrated that the proposed structure removes all the side modes of the single-ring laser using the Vernier effect, and only one hybrid mode is excited in the structure. To further investigate the experimental results, the numerical simulation of the microlasers has also been investigated, and the numerical results closely follow the accuracy of the experimental results. The proposed laser has excellent capabilities with integrated photonic devices because of its extremely compact dimensions and extremely low power threshold.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116946168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A High Swing and Low Power Associative Memory Based on Emerging Technologies 基于新兴技术的高摆幅低功耗联想存储器
2022 Iranian International Conference on Microelectronics (IICM) Pub Date : 2022-12-20 DOI: 10.1109/IICM57986.2022.10152313
Mahan Rezaei, Arefe Amirany, Mohammad Hossein Moaiyaeri, Kian Jafari
{"title":"A High Swing and Low Power Associative Memory Based on Emerging Technologies","authors":"Mahan Rezaei, Arefe Amirany, Mohammad Hossein Moaiyaeri, Kian Jafari","doi":"10.1109/IICM57986.2022.10152313","DOIUrl":"https://doi.org/10.1109/IICM57986.2022.10152313","url":null,"abstract":"Over time, the need to process complex tasks has increased. This need leads to intelligent processors. This paper proposed a robust nonvolatile associative memory based on spintronic synapses utilizing magnetic tunnel junction (MTJ) and carbon nanotube field-effect transistors (CNTFET)-based neurons. The Proposed synapse produces more weights with more distance between them. The proposed design uses the MTJ device because of its fascinating nonvolatility feature. At the same time, CNTFET has overcome the conventional CMOS shortcomings like the short channel effect and low hole mobility. The proposed design is simulated in the presence of process variations. The proposed design in this paper produces 2.2 times more weights with the same number of MTJs compared to a similar design, and this advantage has a high impact on the capacity of the implemented associative memory.","PeriodicalId":131546,"journal":{"name":"2022 Iranian International Conference on Microelectronics (IICM)","volume":"184 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127053156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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