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IEEE Transactions on Circuits and Systems I: Regular Papers最新文献

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IEEE Circuits and Systems Society Information 电气和电子工程师学会电路与系统协会信息
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-25 DOI: 10.1109/TCSI.2024.3469775
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引用次数: 0
Guest Editorial Special Issue on the International Symposium on Integrated Circuits and Systems—ISICAS 2024 集成电路与系统国际研讨会--ISICAS 2024》特邀编辑专刊
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-25 DOI: 10.1109/TCSI.2024.3471029
Xinmiao Zhang
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引用次数: 0
TechRxiv: Share Your Preprint Research with the World! TechRxiv：与世界分享您的预印本研究成果！
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-25 DOI: 10.1109/TCSI.2024.3477149
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引用次数: 0
IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors IEEE 《电路与系统》期刊--I：常规论文 作者须知
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-25 DOI: 10.1109/TCSI.2024.3469773
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引用次数: 0
IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information IEEE 电路与系统论文集--I：常规论文 出版信息
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-25 DOI: 10.1109/TCSI.2024.3469771
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引用次数: 0
IEEE Circuits and Systems Society Information 电气和电子工程师学会电路与系统协会信息
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-01 DOI: 10.1109/TCSI.2024.3460265
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引用次数: 0
IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors IEEE 《电路与系统》期刊--I：常规论文 作者须知
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-01 DOI: 10.1109/TCSI.2024.3460263
{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Information for Authors","authors":"","doi":"10.1109/TCSI.2024.3460263","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3460263","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10702479","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142368601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information IEEE 电路与系统论文集--I：常规论文 出版信息
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-01 DOI: 10.1109/TCSI.2024.3460261
{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information","authors":"","doi":"10.1109/TCSI.2024.3460261","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3460261","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10702443","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142376873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CASCADE: A Framework for CNN Accelerator Synthesis With Concatenation and Refreshing Dataflow CASCADE：利用串联和刷新数据流的 CNN 加速器合成框架
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-01 DOI: 10.1109/TCSI.2024.3452954
Qingyu Guo;Haoyang Luo;Meng Li;Xiyuan Tang;Yuan Wang
{"title":"CASCADE: A Framework for CNN Accelerator Synthesis With Concatenation and Refreshing Dataflow","authors":"Qingyu Guo;Haoyang Luo;Meng Li;Xiyuan Tang;Yuan Wang","doi":"10.1109/TCSI.2024.3452954","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3452954","url":null,"abstract":"Layer Pipeline (LP) represents an innovative architecture for neural network accelerators, which implements task-level pipelining at the granularity of layers. Despite improvements in throughput, LP architectures face challenges due to complicated dataflow design, intricate design space and high resource requirements. In this paper, we introduce an accelerator synthesis framework, CASCADE. CASCADE leverages a novel dataflow, CARD, to efficiently manage convolutional operations’ irregular memory access patterns using simplified logic and minimal buffers. It also employs advanced design space exploration methods to optimize unrolling parallelism and FIFO depth settings automatically for each layer. Finally, to further enhance resource efficiency, CASCADE leverages Lookup Table-based multiplication and accumulation units. With extensive experimental results, we demonstrate that CASCADE significantly outperforms existing works, achieving a \u0000<inline-formula> <tex-math>$3times $ </tex-math></inline-formula>\u0000 improvement in resource efficiency and a \u0000<inline-formula> <tex-math>$4times $ </tex-math></inline-formula>\u0000 improvement in power efficiency. It achieves over \u0000<inline-formula> <tex-math>$1.5times 10^{4}$ </tex-math></inline-formula>\u0000 frames per second throughput and 71.9% accuracy on ImageNet.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142517918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
TechRxiv: Share Your Preprint Research with the World! TechRxiv：与世界分享您的预印本研究成果！
IF 5.2 1区 工程技术
IEEE Transactions on Circuits and Systems I: Regular Papers Pub Date : 2024-10-01 DOI: 10.1109/TCSI.2024.3462329
{"title":"TechRxiv: Share Your Preprint Research with the World!","authors":"","doi":"10.1109/TCSI.2024.3462329","DOIUrl":"https://doi.org/10.1109/TCSI.2024.3462329","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2,"publicationDate":"2024-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10702446","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142368487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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